Abstract: Systems, methods, and non-transitory media are provided for reducing resource and power usage and requirements in staggered high dynamic range (HDR) applications. For example, a first exposure including a set of image data associated with a frame can be stored in memory. The first exposure has a first exposure time and is captured by an image sensor during a first time period associated with the frame. The first exposure can be obtained from the memory, and a second exposure including a set of image data associated with the frame can be obtained from a cache or the image sensor. The second exposure has a second exposure time and is captured by the image sensor during a second time period associated with the frame. The sets of image data from the first and second exposures can be merged, and an HDR image generated based on the sets of image data merged.

Abstract: Systems, methods, and non-transitory media are provided for power-efficient image stabilization. An example method can include collecting measurements from a motion sensor, the measurements being based on movement of an image sensor while capturing frames; calculating parameters for counteracting motions in a frame, wherein first parameters are based on the measurements and second parameters are based on some of the measurements; adjusting, in a first stabilization pass of a dual-pass stabilization process, the first frame according to the second parameters; adjusting, in a second stabilization pass of the dual-pass stabilization process, the first frame according to the first parameters; based on a second frame having less motion than the first frame, enabling for the second frame a single-pass stabilization process for both a frame preview process and video record process; and adjusting, in the single stabilization pass, the second frame according to parameters for counteracting motions in the second frame.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: The various aspects provide for a device and methods for intelligent multicore control of a plurality of processor cores of a multicore integrated circuit. The aspects may identify and activate an optimal set of processor cores to achieve the lowest level power consumption for a given workload or the highest performance for a given power budget. The optimal set of processor cores may be the number of active processor cores or a designation of specific active processor cores. When a temperature reading of the processor cores is below a threshold, a set of processor cores may be selected to provide the lowest power consumption for the given workload. When the temperature reading of the processor cores is above the threshold, a set processor cores may be selected to provide the best performance for a given power budget.

Abstract: The various aspects provide for a device and methods for intelligent multicore control of a plurality of processor cores of a multicore integrated circuit. The aspects may identify and activate an optimal set of processor cores to achieve the lowest level power consumption for a given workload or the highest performance for a given power budget. The optimal set of processor cores may be the number of active processor cores or a designation of specific active processor cores. When a temperature reading of the processor cores is below a threshold, a set of processor cores may be selected to provide the lowest power consumption for the given workload. When the temperature reading of the processor cores is above the threshold, a set processor cores may be selected to provide the best performance for a given power budget.

Abstract: A method and system for dynamically determining the degree of workload parallelism and to automatically adjust the number of cores (and/or processors) supporting a workload in a portable computing device are described. The method and system includes a parallelism monitor module that monitors the activity of an operating system scheduler and one or more work queues of a multicore processor and/or a plurality of central processing units (“CPUs”). The parallelism monitor may calculate a percentage of parallel work based on a current mode of operation of the multicore processor or a plurality of processors. This percentage of parallel work is then passed to a multiprocessor decision algorithm module. The multiprocessor decision algorithm module determines if the current mode of operation for the multicore processor (or plurality of processors) should be changed based on the calculated percentage of parallel work.

Abstract: The present disclosure provides for systems, methods, and apparatus for image processing. These systems, methods, and apparatus may compare a current frame to at least one previous frame to determine an amount of difference. The amount of difference between the current frame and the at least one previous frame may be compared to a threshold value. Additionally, the frame rate may be adjusted based on the comparison of the amount of difference between the current frame and the at least one previous frame and the threshold value. Another example may determine an amount of perceivable difference between a current frame and at least one previous frame and adjust a frame rate based on the determined amount of perceivable difference between the current frame and the at least one previous frame.

Abstract: Methods and apparatus for controlling at least two processing cores in a multi-processor device or system include accessing an operating system run queue to generate virtual pulse trains for each core and correlating the virtual pulse trains to identify patterns of interdependence. The correlated information may be used to determine dynamic frequency/voltage control settings for the first and second processing cores to provide a performance level that accommodates interdependent processes, threads and processing cores.

Abstract: A method and system for dynamically determining the degree of workload parallelism and to automatically adjust the number of cores (and/or processors) supporting a workload in a portable computing device are described. The method and system includes a parallelism monitor module that monitors the activity of an operating system scheduler and one or more work queues of a multicore processor and/or a plurality of central processing units (“CPUs”). The parallelism monitor may calculate a percentage of parallel work based on a current mode of operation of the multicore processor or a plurality of processors. This percentage of parallel work is then passed to a multiprocessor decision algorithm module. The multiprocessor decision algorithm module determines if the current mode of operation for the multicore processor (or plurality of processors) should be changed based on the calculated percentage of parallel work.