Patents by Inventor Eduard A. Cartier

Eduard A. Cartier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11700778
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: July 11, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J. P. Hopstaken
  • Patent number: 11594596
    Abstract: Embodiments of the present invention are directed to a back-end-of-line (BEOL) compatible metal-insulator-metal on-chip decoupling capacitor (MIMCAP). This BEOL compatible process includes a thermal treatment for inducing an amorphous-to-cubic phase change in the insulating layer of the MIM stack prior to forming the top electrode. In a non-limiting embodiment of the invention, a bottom electrode layer is formed, and an insulator layer is formed on a surface of the bottom electrode layer. The insulator layer can include an amorphous dielectric material. The insulator layer is thermally treated such that the amorphous dielectric material undergoes a cubic phase transition, thereby forming a cubic phase dielectric material. A top electrode layer is formed on a surface of the cubic phase dielectric material of the insulator layer.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: February 28, 2023
    Assignee: International Business Machines Corporation
    Inventors: Paul Jamison, Takashi Ando, John Greg Massey, Eduard Cartier
  • Patent number: 11258012
    Abstract: A resistive random access memory (RERAM) apparatus and method for forming the apparatus are provided. Oxygen content control in the RERAM is provided. To provide oxygen content control, a via to an electrode of the RERAM is formed utilizing an oxygen-free plasma etch step. In one embodiment, the dielectric within which the via is formed is silicon nitride (SiN). In exemplary embodiments, the plasma chemistry is a hydrofluorocarbon (CxHyFz)-based plasma chemistry or a fluorocarbon (CxFy)-based plasma chemistry. In one embodiment, the resistive layer of the RERAM is a metal oxide. In another embodiment, the oxygen concentrations in the electrode of the RERAM under the via and outside the via are the same after formation of the via.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: February 22, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Devi Koty, Qingyun Yang, Hiroyuki Miyazoe, Takashi Ando, Eduard Cartier, Vijay Narayanan, Sebastian Ulrich Englemann
  • Patent number: 11216595
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Grant
    Filed: September 21, 2019
    Date of Patent: January 4, 2022
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Patent number: 11152214
    Abstract: A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing channel region; and treating the metal oxide material with an oxidation process. The method may further include depositing of a hafnium containing oxide on the metal oxide material after the oxidation process, and forming a gate conductor atop the hafnium containing oxide. The source and drain regions are on present on opposing sides of the gate structure including the metal oxide material, the hafnium containing oxide and the gate conductor.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: October 19, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, John Bruley, Eduard A. Cartier, Martin M. Frank, Vijay Narayanan, John Rozen
  • Patent number: 11121209
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor on a semiconductor substrate is presented. The method includes forming a first electrode defining columnar grains, forming a dielectric layer over the first electrode, and forming a second electrode over the dielectric layer. The first and second electrodes can be titanium nitride (TiN) electrodes. The dielectric layer can include one of hafnium oxide and zirconium oxide deposited by atomic layer deposition (ALD). The ALD results in deposition of high-k films in grain boundaries of the first electrode.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison, Vijay Narayanan
  • Publication number: 20210234096
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 29, 2021
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J.P. Hopstaken
  • Publication number: 20210193793
    Abstract: Embodiments of the present invention are directed to a back-end-of-line (BEOL) compatible metal-insulator-metal on-chip decoupling capacitor (MIMCAP). This BEOL compatible process includes a thermal treatment for inducing an amorphous-to-cubic phase change in the insulating layer of the MIM stack prior to forming the top electrode. In a non-limiting embodiment of the invention, a bottom electrode layer is formed, and an insulator layer is formed on a surface of the bottom electrode layer. The insulator layer can include an amorphous dielectric material. The insulator layer is thermally treated such that the amorphous dielectric material undergoes a cubic phase transition, thereby forming a cubic phase dielectric material. A top electrode layer is formed on a surface of the cubic phase dielectric material of the insulator layer.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 24, 2021
    Inventors: Paul Jamison, Takashi Ando, John Greg Massey, Eduard Cartier
  • Patent number: 11038013
    Abstract: Embodiments of the present invention are directed to a back-end-of-line (BEOL) compatible metal-insulator-metal on-chip decoupling capacitor (MIMCAP). This BEOL compatible process includes a thermal treatment for inducing an amorphous-to-cubic phase change in the insulating layer of the MIM stack prior to forming the top electrode. In a non-limiting embodiment of the invention, a bottom electrode layer is formed, and an insulator layer is formed on a surface of the bottom electrode layer. The insulator layer can include an amorphous dielectric material. The insulator layer is thermally treated such that the amorphous dielectric material undergoes a cubic phase transition, thereby forming a cubic phase dielectric material. A top electrode layer is formed on a surface of the cubic phase dielectric material of the insulator layer.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: June 15, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul Jamison, Takashi Ando, John Greg Massey, Eduard Cartier
  • Patent number: 10997321
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Grant
    Filed: September 21, 2019
    Date of Patent: May 4, 2021
    Assignee: International Business Machines Corporation
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Patent number: 10991881
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: April 27, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J. P. Hopstaken
  • Patent number: 10978551
    Abstract: A method for forming a metal-insulator-metal (MIM) capacitor on a semiconductor substrate is presented. The method includes forming a first electrode defining columnar grains, forming a dielectric layer over the first electrode, and forming a second electrode over the dielectric layer. The first and second electrodes can be titanium nitride (TiN) electrodes. The dielectric layer can include one of hafnium oxide and zirconium oxide deposited by atomic layer deposition (ALD). The ALD results in deposition of high-k films in grain boundaries of the first electrode.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: April 13, 2021
    Assignee: International Business Machines Corporation
    Inventors: Takashi Ando, Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison, Vijay Narayanan
  • Publication number: 20210028274
    Abstract: Embodiments of the present invention are directed to a back-end-of-line (BEOL) compatible metal-insulator-metal on-chip decoupling capacitor (MIMCAP). This BEOL compatible process includes a thermal treatment for inducing an amorphous-to-cubic phase change in the insulating layer of the MIM stack prior to forming the top electrode. In a non-limiting embodiment of the invention, a bottom electrode layer is formed, and an insulator layer is formed on a surface of the bottom electrode layer. The insulator layer can include an amorphous dielectric material. The insulator layer is thermally treated such that the amorphous dielectric material undergoes a cubic phase transition, thereby forming a cubic phase dielectric material. A top electrode layer is formed on a surface of the cubic phase dielectric material of the insulator layer.
    Type: Application
    Filed: July 24, 2019
    Publication date: January 28, 2021
    Inventors: Paul Jamison, Takashi Ando, John Greg Massey, Eduard Cartier
  • Patent number: 10886362
    Abstract: A tri-layer dielectric stack is provided for a metal-insulator-metal capacitor (MIMCAP). Also, a metal-insulator-metal capacitor (MIMCAP) is provided having three or more electrodes. The tri-layer dielectric stack includes a first layer formed from a first metal oxide electrical insulator. The tri-layer dielectric stack further includes a second layer, disposed over the first layer, formed from ZrO2. The tri-layer dielectric stack also includes a third layer, disposed over the second layer, formed from a second metal oxide electrical insulator.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: January 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, Eduard A. Cartier, Hemanth Jagannathan, Paul C. Jamison
  • Publication number: 20200381624
    Abstract: A method of controlling the forming voltage of a dielectric film in a resistive random access memory (ReRAM) device. The method includes depositing a dielectric film contains intrinsic defects on a substrate, forming a plasma-excited treatment gas containing H2 gas, and exposing the dielectric film to the plasma-excited treatment gas to create additional defects in the dielectric film without substantially changing a physical thickness of the dielectric film, where the additional defects lower the forming voltage needed for generating an electrically conducting filament across the dielectric film. The dielectric film can include a metal oxide film and the plasma-excited treatment gas may be formed using a microwave plasma source.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 3, 2020
    Inventors: Steven Consiglio, Cory Wajda, Kandabara Tapily, Takaaki Tsunomura, Takashi Ando, Paul C. Jamison, Eduard A. Cartier, Vijay Narayanan, Marinus J.P. Hopstaken
  • Patent number: 10833150
    Abstract: A method for converting a dielectric material including a type IV transition metal into a crystalline material that includes forming a predominantly non-crystalline dielectric material including the type IV transition metal on a supporting substrate as a component of an electrical device having a scale of microscale or less; and converting the predominantly non-crystalline dielectric material including the type IV transition metal to a crystalline crystal structure by exposure to energy for durations of less than 100 milliseconds and, in some instances, less than 10 microseconds. The resultant material is fully or partially crystallized and contains a metastable ferroelectric phase such as the polar orthorhombic phase of space group Pca21 or Pmn21. During the conversion to the crystalline crystal structure, adjacently positioned components of the electrical devices are not damaged.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: November 10, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Martin M. Frank, Kam-Leung Lee, Eduard A. Cartier, Vijay Narayanan, Jean Fompeyrine, Stefan Abel, Oleg Gluschenkov, Hemanth Jagannathan
  • Publication number: 20200203607
    Abstract: A resistive random access memory (RERAM) apparatus and method for forming the apparatus are provided. Oxygen content control in the RERAM is provided. To provide oxygen content control, a via to an electrode of the RERAM is formed utilizing an oxygen-free plasma etch step. In one embodiment, the dielectric within which the via is formed is silicon nitride (SiN). In exemplary embodiments, the plasma chemistry is a hydrofluorocarbon (CxHyFz)-based plasma chemistry or a fluorocarbon (CxFy)-based plasma chemistry. In one embodiment, the resistive layer of the RERAM is a metal oxide. In another embodiment, the oxygen concentrations in the electrode of the RERAM under the via and outside the via are the same after formation of the via.
    Type: Application
    Filed: April 16, 2019
    Publication date: June 25, 2020
    Inventors: Devi Koty, Qingyun Yang, Hiroyuki Miyazoe, Takashi Ando, Eduard Cartier, Vijay Narayanan, Sebastian Ulrich Englemann
  • Publication number: 20200019731
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Application
    Filed: September 21, 2019
    Publication date: January 16, 2020
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff
  • Publication number: 20200020762
    Abstract: A method for converting a dielectric material including a type IV transition metal into a crystalline material that includes forming a predominantly non-crystalline dielectric material including the type IV transition metal on a supporting substrate as a component of an electrical device having a scale of microscale or less; and converting the predominantly non-crystalline dielectric material including the type IV transition metal to a crystalline crystal structure by exposure to energy for durations of less than 100 milliseconds and, in some instances, less than 10 microseconds. The resultant material is fully or partially crystallized and contains a metastable ferroelectric phase such as the polar orthorhombic phase of space group Pca21 or Pmn21. During the conversion to the crystalline crystal structure, adjacently positioned components of the electrical devices are not damaged.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 16, 2020
    Inventors: Martin M. Frank, Kam-Leung Lee, Eduard A. Cartier, Vijay Narayanan, Jean Fompeyrine, Stefan Abel, Oleg Gluschenkov, Hemanth Jagannathan
  • Publication number: 20200019732
    Abstract: A private key of a public-private key pair with a corresponding identity is written to an integrated circuit including a processor, a non-volatile memory, and a cryptographic engine coupled to the processor and the non-volatile memory. The private key is written to the non-volatile memory. The integrated circuit is implemented in complementary metal-oxide semiconductor 14 nm or smaller technology. The integrated circuit is permanently modified, subsequent to the writing, such that further writing to the non-volatile memory is disabled and such that the private key can be read only by the cryptographic engine and not off-chip. Corresponding integrated circuits and wafers are also disclosed.
    Type: Application
    Filed: September 21, 2019
    Publication date: January 16, 2020
    Inventors: Richard H. Boivie, Eduard A. Cartier, Daniel J. Friedman, Kohji Hosokawa, Charanjit Jutla, Wanki Kim, Chandrasekara Kothandaraman, Chung Lam, Frank R. Libsch, Seiji Munetoh, Ramachandran Muralidhar, Vijay Narayanan, Dirk Pfeiffer, Devendra K. Sadana, Ghavam G. Shahidi, Robert L. Wisnieff