Abstract: A single-chip microcomputer comprises a processor incorporating a computation process control unit and an operation execution unit. The microcomputer further comprises a memory unit, an interface, a buffer storage cell, and a unit to control exchange of information transmitted through a system line. All these units and the processor with its computation process control unit and operation excution unit are interconnected by a bidirectional bus. The processor also includes a buffer storage cell, a processor information exchange control unit, and an address comparator, which are all interconnected. The single-chip microcomputer further contains a bus arbiter and a system line arbiter which are connected to the unit to control exchange of information transmitted through the system line. Finally, the microcomputer includes a system line address comparator connected to the processor and buffer storage cell.

Abstract: A data processing system intended for handling multiple tasks and comprising at least two processors, a memory unit and an I/O unit which are all connected to a data address and control signal transmission line. Each of the processors comprises an arithmetic-logic unit, a scratch pad memory, a processor status register, an interface, and a control unit which are all interconnected by a processor data bus. Each of the processors further contains an address interrupt unit whose input/output is connected to the data address and control signal transmission line. A first output of the address interrupt unit is connected to the processor data bus and its second output is connected to a second input of the control unit. A second control output of the control unit is connected to the input of the address interrupt unit. The invention helps increase the throughput of a data processing system and simplify the programming of interaction between the system's processors.