Patents by Inventor Eduard Lecha

Eduard Lecha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220109558
    Abstract: In one example an apparatus comprises verification circuitry to store an object image in a computer readable memory external to an XMSS verifier circuitry and verify the object image by repeating operations to receive, in a local memory of the XMSS verifier circuitry, a fixed-sized block of data from the object image and process the fixed-sized block of data to compute the signature verification. Other examples may be described.
    Type: Application
    Filed: December 15, 2021
    Publication date: April 7, 2022
    Applicant: Intel Corporation
    Inventors: Vikram Suresh, Santosh Ghosh, Shalini Sharma, Eduard Lecha, Manoj Sastry, Xiaoyu Ruan, Sanu Mathew
  • Patent number: 8031695
    Abstract: An HDLC frame formation technique that calculates fields based on unscrambled data and combines unscrambled fields with scrambled data. Decoding HDLC frames includes determining integrity of the scrambled data based on the unscrambled fields.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: October 4, 2011
    Assignee: Intel Corporation
    Inventor: Eduard Lecha
  • Patent number: 7684404
    Abstract: A method for formatting ATM cells compliant with SPI-4 Phase 2 specification is presented. The method enables selection among various cell formats depending on the devices employed, and enables use of a payload-only test format, a typical format having payload and header data, a format having header error correction (HEC) data and dummy data, and a format having HEC data and user data.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: March 23, 2010
    Assignee: Intel Corporation
    Inventors: Eduard Lecha, Ramji Pankhaniya, Tein-Yow Yu
  • Patent number: 7525977
    Abstract: A device for mapping and demapping cells in an orderly manner is provided. The device employs a channel identifier and in certain configurations a buffer and series of stages to provide for relatively ordered, predictable mapping and demapping of data, such as virtual concatenation data.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: April 28, 2009
    Assignee: Intel Corporation
    Inventors: Eduard Lecha, Vasan Karighattam, Steve J. Clohset, Soowan Suh, Jing Ling, Juan-Carlos Calderon, Jean-Michel Caia
  • Patent number: 7515598
    Abstract: According to some embodiments, an apparatus is provided comprising a plurality of transmit storage structures each being associated with a storage width, a write block, and a read block. The write block is to receive information having a first width via an interface associated with a configurable width, and the read block is to read the information from the storage structures and is to transmit information to a network line.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: April 7, 2009
    Assignee: Intel Corporation
    Inventors: Eduard Lecha, Carlos Calderon, Jesus Gonzalez
  • Patent number: 7171604
    Abstract: Configurable CRC calculation engines and methods of performing CRC calculations are presented. The configurable CRC calculation engines calculate a CRC value for the data using an associated polynomial and remainder. The method includes receiving a polynomial, receiving a block of data to determine a CRC value for, and calculating a CRC value for the data using the polynomial. With such devices and methods, the configurable CRC calculation engines are useful in various applications and protocols.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: January 30, 2007
    Assignee: Intel Corporation
    Inventors: Jaroslaw J. Sydir, Alok J Mathur, Wajdi Feghali, Kamal J. Koshy, Eduard Lecha
  • Publication number: 20050249189
    Abstract: An HDLC frame formation technique that calculates fields based on unscrambled data and combines unscrambled fields with scrambled data. Decoding HDLC frames includes determining integrity of the scrambled data based on the unscrambled fields.
    Type: Application
    Filed: May 4, 2004
    Publication date: November 10, 2005
    Inventor: Eduard Lecha
  • Publication number: 20050154960
    Abstract: Configurable CRC calculation engines and methods of performing CRC calculations are presented. The configurable CRC calculation engines calculate a CRC value for the data using an associated polynomial and remainder. The method includes receiving a polynomial, receiving a block of data to determine a CRC value for, and calculating a CRC value for the data using the polynomial. With such devices and methods, the configurable CRC calculation engines are useful in various applications and protocols.
    Type: Application
    Filed: December 30, 2003
    Publication date: July 14, 2005
    Inventors: Jaroslaw Sydir, Alok Mathur, Wajdi Feghali, Kamal Koshy, Eduard Lecha
  • Publication number: 20040081163
    Abstract: According to some embodiments, configurable transmit and receive system interfaces are proved for a network device.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 29, 2004
    Inventors: Eduard Lecha, Carlos Calderon, Jesus Gonzalez
  • Publication number: 20030172178
    Abstract: A system to generate and transfer data frames without frame abortion includes an input source to provide input characters to transmit. A frame writing device generates the data frames having the input characters, stuffed characters, and non-data characters. The frame writing device inserts the stuffed characters into the data frames in place of the input characters that are identical to predetermined special characters utilized in the data frames. No more than two different special characters are utilized in the data frames. A frame transmitting device transmits the data frames. A frame receiving device receives the data frames. A data extraction device extracts the input characters from the data frames. The data extraction device extracts the input characters from the stuffed characters.
    Type: Application
    Filed: March 8, 2002
    Publication date: September 11, 2003
    Inventors: Eduard Lecha, Juan-Carlos Calderon