Patents by Inventor Eduardo M. Lipiansky

Eduardo M. Lipiansky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9692309
    Abstract: Devices and methods for monitoring and determining alternating current (AC) power system parameters are provided. In some implementations, the device can include a processor; and at least one non-transitory computer-readable medium storing computer-executable instructions for implementing a number of components. The components include a monitor configured to: sense an AC line voltage signal and an AC current voltage signal; filter the AC line voltage signal; calculate average AC line voltage and current values based, at least, on a DC voltage and current values corresponding to the AC line voltage and current signals, respectively; determine fundamental AC line voltage and current signals based, at least, on zero crossings of the respective average AC line voltage value and the average AC line current value; and determine one or more AC power system parameters based, at least, on the fundamental AC line voltage signal and the fundamental AC line current signal.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: June 27, 2017
    Assignee: Google Inc.
    Inventors: Sangsun Kim, Eduardo M. Lipiansky
  • Patent number: 9151817
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: October 6, 2015
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 8471542
    Abstract: Aspects of the invention pertain to optimization of multi-phase voltage converter efficiency regardless of load conditions. A processor is coupled to different stages of a power control system. Input and output voltages to the different stages are monitored and varied the processor. The processor is also configured to activate or deactivate different phases of the voltage converter in accordance with load current conditions.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: June 25, 2013
    Assignee: Google Inc.
    Inventors: Eduardo M. Lipiansky, Srikanth Lakshmikanthan
  • Patent number: 8451153
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 28, 2013
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 8344246
    Abstract: Aspects of the invention pertain to cooling bundles of power distribution cables or other current carrying cables. Such cables give off heat, especially when carrying high current loads. One or more cooling members are used to secure multiple cables. The cables may be placed about a generally circular shaped member which has a central opening. Receptacles are placed along an outer perimeter of the cooling member to secure the cables. The thickness of each cooling member may vary. When multiple cooling members are used, they may be spaced at least 6 inches apart. The cooling members may be fabricated from a nonconductive material such as PVC.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: January 1, 2013
    Assignee: Google Inc.
    Inventors: Eduardo M. Lipiansky, Pascal C. Kam
  • Patent number: 8084884
    Abstract: Aspects of the invention pertain to optimization of voltage converter efficiency for all load conditions. A signal conditioning circuit is electrically connected to a number of buck converter modules that supply power to different loads. Each module includes a voltage regulator module, which issues a signal that is proportional for its respective load current. The signal conditioning circuit integrates and averages the signals from each voltage regulator module to produce a conditioned voltage signal. The conditioned signal drives a controller, which in turn provides control information to a power conversion circuit. Operation of the signal conditioning circuit cause the controller and power conversion circuit to adapt the driver voltage of the buck converter modules, which improves and optimizes efficiency for all loads.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: December 27, 2011
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky
  • Publication number: 20110289335
    Abstract: Aspects of the invention pertain to optimization of multi-phase voltage converter efficiency regardless of load conditions. A processor is coupled to different stages of a power control system. Input and output voltages to the different stages are monitored and varied the processor. The processor is also configured to activate or deactivate different phases of the voltage converter in accordance with load current conditions.
    Type: Application
    Filed: May 20, 2010
    Publication date: November 24, 2011
    Applicant: GOOGLE INC.
    Inventors: Eduardo M. Lipiansky, Srikanth Lakshmikanthan
  • Publication number: 20110240341
    Abstract: Aspects of the invention pertain to cooling bundles of power distribution cables or other current carrying cables. Such cables give off heat, especially when carrying high current loads. One or more cooling members are used to secure multiple cables. The cables may be placed about a generally circular shaped member which has a central opening. Receptacles are placed along an outer perimeter of the cooling member to secure the cables. The thickness of each cooling member may vary. When multiple cooling members are used, they may be spaced at least 6 inches apart. The cooling members may be fabricated from a nonconductive material such as PVC.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Applicant: GOOGLE INC.
    Inventors: Eduardo M. Lipiansky, Pascal C. Kam
  • Patent number: 7986254
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: July 26, 2011
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 7741983
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: June 22, 2010
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 6035262
    Abstract: Logic circuitry in the form of an integrated circuit includes a number of scannable registers located at various locations of the logic circuitry to continuously sample signal states thereat. In response to signalling from a maintenance diagnostic processor the scannable registers can be commanded to freeze their content for extraction and observation to determining the operating condition of the logic circuitry.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: March 7, 2000
    Assignee: Tandem Computers Incorporated
    Inventors: Walter E. Gibson, Jeffery A. Sprouse, Eduardo M. Lipiansky, Javad Khakbaz, Michael A. Plum, Philip R. Manela, Ko Yamamoto