Patents by Inventor Edward A. Rezek

Edward A. Rezek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6965714
    Abstract: The invention relates to an optical, integrated alignment device for accurately aligning and efficiently coupling energy between in-plane optical devices. A semiconductor substrate is etched to include a groove for an optical fiber and a lens for passing an optical signal from a cut fiber to a photodetector. The etched semiconductor substrate may be used to pass an optical signal from a surface light emitting device to a cut fiber. The end of the optical fiber is cut at a slant that redirects an optical signal from the fiber through the lens or vice-versa. The lens focuses the optical signal onto a target.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: November 15, 2005
    Assignee: Northrop Grumman Corporation
    Inventors: John C. Brock, Dean Tran, Edward A. Rezek, Christian L. Marquez, Michelle M. Hazard
  • Publication number: 20030231828
    Abstract: The invention relates to an optical, integrated alignment device for accurately aligning and efficiently coupling energy between in-plane optical devices. A semiconductor substrate is etched to include a groove for an optical fiber and a lens for passing an optical signal from a cut fiber to a photodetector. The etched semiconductor substrate may be used to pass an optical signal from a surface light emitting device to a cut fiber. The end of the optical fiber is cut at a slant that redirects an optical signal from the fiber through the lens or vice-versa. The lens focuses the optical signal onto a target.
    Type: Application
    Filed: June 13, 2002
    Publication date: December 18, 2003
    Inventors: John C. Brock, Dean Tran, Edward A. Rezek, Christian L. Marquez, Michelle M. Hazard
  • Patent number: 6613600
    Abstract: A resonant photodetector assembly (10) which uses multiple reflections of light within a photodetector (20) to convert input light into an electrical signal. The photodetector (20) includes a combination of generally planar semiconductor layers including a photodetector active layer (36) where light is converted into an electrical output. The photodetector (20) further includes a first outer electrical contact layer (34) and a second outer electrical contact layer (42). A waveguide (22) is positioned on the photodetector (20) and has a waveguide active layer (26) positioned between a pair of waveguide cladding layers (24, 28), a first end (30) for receiving input light and a second end (50) for reflecting the light. A reflector (32) is positioned on the second end (50) of the waveguide (22) at an angle relative to a line parallel to the substrate (14), where the reflector (32) reflects the light received by the first end (30) of the waveguide active layer (26) towards the photodetector (20).
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: September 2, 2003
    Assignee: TRW Inc.
    Inventors: Dean Tran, Edward A. Rezek, Eric R. Anderson, William L. Jones
  • Patent number: 6566724
    Abstract: A low dark current photodiode and a method for reducing dark current in a photodiode. A preferred embodiment of the present invention provides a photodiode comprising a barrier layer. The barrier layer comprises a barrier layer material having a wider band-gap than the band-gap of the absorption layer material of the photodiode. The barrier layer comprises sublayers, which are doped to position the high-electric field region at the pn junction of the photodiode in the barrier layer. The method for reducing dark current in a photodiode comprises building a barrier layer into the structure of a photodiode. Building the barrier layer comprises building a layer of semiconductor material with wider band-gap than the i-layer material. Building the barrier layer preferably further comprises doping the barrier layer material to position the high-energy region at the pn junction of the photodiode in the barrier layer, thus reducing dark current.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: May 20, 2003
    Assignee: Northrop Grumman Corporation
    Inventors: Augusto Gutierrez-Aitken, Edward A. Rezek
  • Publication number: 20030089958
    Abstract: A low dark current photodiode and a method for reducing dark current in a photodiode. A preferred embodiment of the present invention provides a photodiode comprising a barrier layer. The barrier layer comprises a barrier layer material having a wider band-gap than the band-gap of the absorption layer material of the photodiode. The barrier layer comprises sublayers, which are doped to position the high-electric field region at the pn junction of the photodiode in the barrier layer. The method for reducing dark current in a photodiode comprises building a barrier layer into the structure of a photodiode. Building the barrier layer comprises building a layer of semiconductor material with wider band-gap than the i-layer material. Building the barrier layer preferably further comprises doping the barrier layer material to position the high-energy region at the pn junction of the photodiode in the barrier layer, thus reducing dark current.
    Type: Application
    Filed: December 19, 2000
    Publication date: May 15, 2003
    Inventors: Augusto Gutierrez-Aitken, Edward A. Rezek
  • Patent number: 6437233
    Abstract: A solar cell comprises a superstrate formed from a material that is transparent to light, a first layer formed of delta doped silicon, a plurality of layers formed from semiconductor materials, each characterized by multi-quantum wells and multiple band gaps, a first semiconductor layer having a band gap energy state that is the smallest, the last semiconductor layer having-a band gap that is the largest, and the intermediate semiconductor layers having band gaps transitioning from the smallest to the largest, a second layer overlying the semiconductor layers and formed of delta doped silicon, an n-cap layer formed on the second delta doped layer, and a metal layer formed on the n-cap layer and serving to reflect light into the semiconductor.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: August 20, 2002
    Assignee: TRW Inc.
    Inventors: Dean Tran, George J. Vendura, Jr., William L. Jones, Edward A. Rezek
  • Patent number: 6365430
    Abstract: An angle cavity resonant photodetector assembly (8), which uses multiple reflections of light within a photodetector (14) to convert input light into an electrical signal. The photodetector (14) has a combination of generally planar semiconductor layers including semiconductor active layers (20) where light is converted into an electrical output. The photodetector (14) is positioned relative to a waveguide (10), where the waveguide (10) has a waveguide active layer (22) located between a pair of waveguide cladding layers (24) and (26) and includes a first end (28) for receiving light and a second end (30) for transmitting the light to the photodetector (14). The photodetector (14) has a first reflector (12) and second reflector (16) that provides for multiple reflections across the semiconductor active layers (20).
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: April 2, 2002
    Assignee: TRW Inc.
    Inventors: Dean Tran, Edward A. Rezek, Eric R. Anderson
  • Publication number: 20020033443
    Abstract: A resonant photodetector assembly (10) which uses multiple reflections of light within a photodetector (20) to convert input light into an electrical signal. The photodetector (20) includes a combination of generally planar semiconductor layers including a photodetector active layer (36) where light is converted into an electrical output. The photodetector (20) further includes a first outer electrical contact layer (34) and a second outer electrical contact layer (42). A waveguide (22) is positioned on the photodetector (20) and has a waveguide active layer (26) positioned between a pair of waveguide cladding layers (24, 28), a first end (30) for receiving input light and a second end (50) for reflecting the light. A reflector (32) is positioned on the second end (50) of the waveguide (22) at an angle relative to a line parallel to the substrate (14), where the reflector (32) reflects the light received by the first end (30) of the waveguide active layer (26) towards the photodetector (20).
    Type: Application
    Filed: October 24, 2001
    Publication date: March 21, 2002
    Applicant: TRW Inc.
    Inventors: Dean Tran, Edward A. Rezek, Eric R. Anderson, William L. Jones
  • Patent number: 6323480
    Abstract: A resonant photodetector assembly (10) which uses multiple reflections of light within a photodetector (20) to convert input light into an electrical signal. The photodetector (20) includes a combination of generally planar semiconductor layers including a photodetector active layer (36) where light is converted into an electrical output. The photodetector (20) further includes a first outer electrical contact layer (34) and a second outer electrical contact layer (42). A waveguide (22) is positioned on the photodetector (20) and has a waveguide active layer (26) positioned between a pair of waveguide cladding layers (24, 28), a first end (30) for receiving input light and a second end (50) for reflecting the light. A reflector (32) is positioned on the second end (50) of the waveguide (22) at an angle relative to a line parallel to the substrate (14), where the reflector (32) reflects the light received by the first end (30) of the waveguide active layer (26) towards the photodetector (20).
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: November 27, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Edward A. Rezek, Eric R. Anderson, William L. Jones
  • Patent number: 6252725
    Abstract: A method for fabricating a monolithic micro-optical component. The construction of the micro-optical components is accomplished by using standard semiconductor fabrication techniques. The method comprises the steps of depositing an etch stop layer (44) onto a semiconductor substrate (42); depositing an optical component layer (46) onto the etch stop layer (44); coating the entire surface of the optical component layer with a photoresist material; applying a photoresist mask (50) to the photoresist material on the optical component layer (46); selectively etching away the optical component layer (46) to form at least one optical column (52); forming a pedestal (54) for each of the optical columns (52) by selectively etching away the etch stop layer (44); and finally polishing each of the optical columns (52), thereby forming monolithic optical components (56).
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: June 26, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek, Luis M. Rochin
  • Patent number: 6207975
    Abstract: An angle cavity resonant photodetector assembly (8), which uses multiple reflections of light within a photodetector (14) to convert input light into an electrical signal. The photodetector (14) has a combination of generally planar semiconductor layers including semiconductor active layers (20) where light is converted into an electrical output. The photodetector (14) is positioned relative to a waveguide (10), where the waveguide (10) has a waveguide active layer (22) located between a pair of waveguide cladding layers (24) and (26) and includes a first end (28) for receiving light and a second end (30) for transmitting the light to the photodetector (14). The photodetector (14) has a first reflector (12) and second reflector (16) that provides for multiple reflections across the semiconductor active layers (20).
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: March 27, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Edward A. Rezek
  • Patent number: 6187515
    Abstract: The invention relates to an optical integrated circuit microbench system for accurately aligning optical fiber and waveguides to efficiently couple energy between optical devices. This is accomplished by using the anisotropic etch characteristics of III-V semiconductor materials in two orthogonal directions. One etch direction serves to provide a channel for precise fiber-positioning; the other direction, which is orthogonal provides a reflecting surface for directing the optical energy onto optical devices.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: February 13, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek
  • Patent number: 6181460
    Abstract: A micromirror device (10) is provided with a rotatable optical component (22) for use in a digital image processing application. The micromirror device (10) includes a semiconductor wafer (12), having a recess (14) formed therein, and a platform (20) with the optical component (22) deposited thereon that is movably coupled to the side surface of the recess (14). A first magnetic field source (24) is disposed around the periphery of the optical component (22) on the platform (20) and a second magnetic field source (26) is disposed proximate to this first magnetic field source (24), such that these magnetic field sources are selectively activatable to generate an electromagnetic field for rotating the platform (20). More specifically, the second magnetic field source (26) is disposed on the angular side surfaces of the recess (14) or adjacent to the recess (14) on a top surface of the wafer (12).
    Type: Grant
    Filed: November 18, 1998
    Date of Patent: January 30, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Edward A. Rezek, Eric R. Anderson, William L. Jones
  • Patent number: 6172414
    Abstract: An interconnected apparatus for producing a low loss, reproducible electrical interconnection between a semiconductor device and a substrate includes a rod and rod receptor. The rod, generally cylindrically shaped, is attached to the semiconductor device and includes an outer circumferential wall which comes into contact with the rod receptor during a bonding process. A lip portion is formed on one end of the rod receptor for interlocking engagement with the rod. The rod receptor is plated on the substrate and includes a generally circularly shaped body which forms a centrally disposed well for receiving the rod. A lip portion is formed on one end or mouth of the rod receptor for interlocking engagement with the rod. When the rod and corresponding receptor are aligned and brought together, the rod deforms and interlocks with its corresponding rod receptor. A thermo-compression bonding process is utilized to bond the rod to the rod receptor, thereby producing a strong interlocking bond.
    Type: Grant
    Filed: April 28, 1998
    Date of Patent: January 9, 2001
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek
  • Patent number: 6150192
    Abstract: An interconnected apparatus for producing a low loss, reproducible electrical interconnection between a semiconductor device and a substrate includes a rod and rod receptor. The rod, generally cylindrically shaped, is attached to the semiconductor device and includes an outer circumferential wall which comes into contact with the rod receptor during a bonding process. A lip portion is formed on one end of the rod receptor for interlocking engagement with the rod. The rod receptor is plated on the substrate and includes a generally circularly shaped body which forms a centrally disposed well for receiving the rod. A lip portion is formed on one end or mouth of the rod receptor for interlocking engagement with the rod. When the rod and corresponding receptor are aligned and brought together, the rod deforms and interlocks with its corresponding rod receptor. A thermo-compression bonding process is utilized to bond the rod to the rod receptor, thereby producing a strong interlocking bond.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: November 21, 2000
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek
  • Patent number: 6115521
    Abstract: The invention relates to an optical integrated alignment device for accurately aligning optical fiber and waveguides to efficiently couple energy between optical devices. This is accomplished by using the anisotropic etch characteristics of III-V semiconductor materials. One orthogonal etch direction serves to provide a channel for precise fiber-positioning; the other direction, which is also orthogonal provides a reflecting surface for directing the optical energy between optical devices; and finally, a non-selective etch to form a micro-optical lens to focus optical energy to an optical device.
    Type: Grant
    Filed: May 7, 1998
    Date of Patent: September 5, 2000
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek
  • Patent number: 6074888
    Abstract: A method for fabricating a monolithic micro-optical component. The construction of the micro-optical components is accomplished by using standard semiconductor fabrication techniques. The method comprises the steps of depositing an etch stop layer (44) onto a semiconductor substrate (42); depositing an optical component layer (46) onto the etch stop layer (44); coating the entire surface of the optical component layer with a photoresist material; applying a photoresist mask (50) to the photoresist material on the optical component layer (46); selectively etching away the optical component layer (46) to form at least one optical column (52); forming a pedestal (54) for each of the optical columns (52) by selectively etching away the etch stop layer (44); and finally polishing each of the optical columns (52), thereby forming monolithic optical components (56).
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: June 13, 2000
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek, Luis M. Rochin
  • Patent number: 5853960
    Abstract: The invention relates to a method for fabricating III-V semiconductor micro-optical lenses for hybrid integration with micro-optical devices, where a micro-optical lens is formed from a semiconductor wafer by selectively etching a surface of the semiconductor wafer and a lens arm is formed from the semiconductor wafer on a surface opposite the surface by selectively etching the surface of the semiconductor wafer. The lens and lens arm are then cleaved from the substrate wafer and directly mounted to a micro-optical device. As a result of using III-V semiconductor material to form micro-optical lenses for hybrid integration to micro-optical devices of the same semiconductor material, thermal expansion stability is increased and efficient transfer of light between micro-optical lenses and micro-optical devices is achieved.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: December 29, 1998
    Assignee: TRW Inc.
    Inventors: Dean Tran, Eric R. Anderson, Ronald L. Strijek, Edward A. Rezek
  • Patent number: 4694311
    Abstract: A light-emitting diode, and corresponding method for its fabrication, in which a blocking layer is used for current confinement, and a rectangular light emission pattern is employed, to avoid an isotropic effects when material systems such as indium phosphide are used. A critical step in the method of the invention is etching an opening through the blocking layer. The opening has its sides precisely oriented at forty-five degrees with respect to the cleavage planes of the substrate, to avoid exposing any crystal planes that are anisotropic.
    Type: Grant
    Filed: September 11, 1986
    Date of Patent: September 15, 1987
    Assignee: TRW Inc.
    Inventors: Edward A. Rezek, Andre Burghard
  • Patent number: 4647320
    Abstract: A light-emitting diode and corresponding method for its fabrication, in which a blocking layer is used for current confinement, and a rectangular light emission pattern is employed, to avoid anisotropic effects when material systems such as indium phosphide are used. A critical step in the method of the invention is etching an opening through the blocking layer. The opening has its sides precisely oriented at forty-five degrees with respect to the cleavage planes of the substrate, to avoid exposing any crystal planes that are anisotropic.
    Type: Grant
    Filed: May 22, 1985
    Date of Patent: March 3, 1987
    Assignee: TRW Inc.
    Inventors: Edward A. Rezek, Andre Burghard, Alan L. Carpenter