Abstract: An existing network configuration is assessed, and potential changes to the existing configuration are identified that provide the greatest incremental improvements to the performance of the network. In a preferred embodiment, the user of the system identifies the maximum number (N) of changes that may be implemented in an existing network, and the system provides a set of possible reconfigurations, each requiring fewer than N changes. The user is presented a display of the potential improvement provided by each set as a function of the number of changes in the set, so that the relative incremental gain can be easily visualized. The objective function of the optimization may include conventional load-balancing objectives, or other objectives, such as a global minimization of path lengths.

Abstract: An interactive system and method automates the control and management of routing changes that are focused on specific routes or particular network hot spots. Based on the premise that the user is aware of a particular problem that needs to be solved, the system leads the user through an end-to-end process from the identification of the problem to the generation of configuration instructions for effecting a selected solution. A graphic user interface provides a visualization of the current routing and alternative routings, to facilitate the analysis and selection of an improved routing, if any. Throughout the process, the effect of each proposed routing change on the overall network performance is determined, so that the selection of a preferred solution can be made in the appropriate context, and globally sub-optimal solutions can be avoided.

Abstract: An existing network configuration is assessed, and potential changes to the existing configuration are identified that provide the greatest incremental improvements to the performance of the network. In a preferred embodiment, the user of the system identifies the maximum number (N) of changes that may be implemented in an existing network, and the system provides a set of possible reconfigurations, each requiring fewer than N changes. The user is presented a display of the potential improvement provided by each set as a function of the number of changes in the set, so that the relative incremental gain can be easily visualized. The objective function of the optimization may include conventional load-balancing objectives, or other objectives, such as a global minimization of path lengths.

Abstract: Devices and methods for modeling and analysis of services provided over a common network include a processor configured to track services connected to the common network through nodes and links; run service models associated with the services under selected conditions, the selected conditions including failure and repair of one of the nodes or links; and propose corrective action and/or change of network resources of the common network to minimize impact of the failure. The processor may also run Network model(s). The models may be executed successively or simultaneously, and outputs of one model may be used as input to other models, including any necessary conversions for compatibility.

Abstract: A system for analyzing network activity by displaying in a first portion of a display, network objects according to an activity characteristic, receiving a selection of one or more of the network objects, and displaying in a second portion of the display, a further activity characteristic of the selected network objects according to at least a first criteria. The display of the network objects may be altered according to second criteria that may include filtering criteria that removes network objects displayed in the first portion. The results of the altered display may be displayed in a third portion of the display providing further details of the selected network objects. The selection of the network object may be a selection of a plurality of objects and the displayed activity characteristic may be a sum of the selected network objects activity characteristics.

Abstract: A path-flow formulation of defining MPLS FRR bypass LSPs is presented. The path-flow formulation comprises first identifying a set of candidate bypass LSPs, each of which meets various network constraints and has an explicit route around a network facility to be protected. The constraints may include Quality of Service (QoS) guarantees, implementation requirements, network element resource limitations, and resiliency requirements. The constraints may be user-selected, and may be non-linear. The set of candidate bypass LSPs form a linear programming (LP) problem, or an integer linear programming (ILP) problem if the allowable number of bypass LSPs is constrained. In an optimization step, LP solutions are used to select the bypass LSPs from among the candidate bypass LSPs by allocating bandwidth to them.

Abstract: Traffic flow between each pair of nodes in a network are determined based on loads measured at each link and based on gravity measures associated with each node. The gravity measures correspond to a relative likelihood of the node being a source or a sink of traffic, and may be assigned based on ‘soft’ characteristics associated with each node, such as the demographics of the region in which the node is located, prior sinking and sourcing statistics, and so on. Because the assigned gravities are relatively subjective, the gravity measures are used to generate an objective function for solving a system of linear equations, rather than as criteria that must be satisfied in the solution. The measured link loads are allocated among the traffic flows between nodes to at least a given allocation efficiency criteria by solving a system of linear equations with an objective of minimizing a difference between the assigned gravities and the resultant gravities corresponding to the determined flows.

Abstract: A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.

Abstract: A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate. an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.

Abstract: A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.

Abstract: A system including a bench, selection template and drilling template registerable to the bench. The drilling template including apertures which can receive a guide bushing for guiding a plunge router into a panel for drilling an aperture pattern in the panel. The aperture pattern can be a system 32 pattern.

Abstract: A system including a bench, selection template and drilling template registerable to the bench. The drilling template including apertures which can receive a guide bushing for guiding a plunge router into a panel for drilling an aperture pattern in the panel. The aperture pattern can be a system 32 pattern.

Abstract: A precision, low jitter oscillator circuit is provided that is particularly well-suited for generating a clock signal in miniature digital systems, such as digital hearing aids. The oscillator includes a plurality of differential inverters configured in a feedback loop to generate an oscillating clock signal. The differential inverters include a capacitive trimming network for adjusting the frequency of the oscillating clock signal and employ resistive loads for minimizing jitter in the clock signal. The components of the oscillator are fabricated in a common silicon process to minimize the size of the oscillator.