Patents by Inventor Edward Atherton
Edward Atherton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8758843Abstract: The present invention relates to a process for the manufacture of an animal feed block according to a target constituent formulation. The process eliminates spoiling of product by inconsistent and fluctuating levels of active ingredient and wet ingredients so as to ensure repeatability from one batch to another.Type: GrantFiled: October 1, 2012Date of Patent: June 24, 2014Assignee: Carrs Agriculture LimitedInventors: Nigel John Hillyer, Edward Atherton
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Patent number: 7661044Abstract: Method and system for repairing memory failure in a computer system in one aspect determines one or more test patterns and time duration for testing the new memory unit that replaced a failed memory unit. The test pattern is written to the new memory unit and read from the new memory unit. The read pattern is compared to the test pattern that was used to write. If the read test pattern and the written test pattern doe not match, a further repair action is taken. If they match, writing and reading of the test pattern repeats until the time duration for testing expires. The new memory unit may be configured as available for use when the write and read test completes successfully for the testing time duration.Type: GrantFiled: February 12, 2007Date of Patent: February 9, 2010Assignee: International Business Machines CorporationInventors: Tara Astigarraga, William Edward Atherton, Michael Browne
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Patent number: 7487409Abstract: An apparatus, system, and method are disclosed for accessing system information. The apparatus includes an observation module, a monitoring module, and an action module. The observation module receives input device signals. The monitoring module recognizes selected inputs from among input data. The action module, working independently of the local system, selectively or automatically causes system information or action to be conveyed to a user.Type: GrantFiled: August 31, 2005Date of Patent: February 3, 2009Assignee: International Business Machines CorporationInventors: William Edward Atherton, Fernando Aramis Lopez, Robert Russell Wolford
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Publication number: 20080195902Abstract: Method and system for repairing memory failure in a computer system in one aspect determines one or more test patterns and time duration for testing the new memory unit that replaced a failed memory unit. The test pattern is written to the new memory unit and read from the new memory unit. The read pattern is compared to the test pattern that was used to write. If the read test pattern and the written test pattern doe not match, a further repair action is taken. If they match, writing and reading of the test pattern repeats until the time duration for testing expires. The new memory unit may be configured as available for use when the write and read test completes successfully for the testing time duration.Type: ApplicationFiled: February 12, 2007Publication date: August 14, 2008Applicant: International Business Machines CorporationInventors: Tara Astigarraga, William Edward Atherton, Michael E. Browne
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Publication number: 20080125889Abstract: A method, computer program product, and system for playing a series of discrete digital selections, such a MP3 files, from a selection database selected at least in part on user preference ratings, receiving user preference feedback for a particular selection while the particular selection is playing, and altering the user preference rating for the particular selection based upon the user preference feedback received. The user preference feedback may be provided in the form of a new user preference rating or an instruction to increment or decrement the current user preference rating. Alternatively, the user preference feedback may be determined by user interaction with standard controls, such as an increase in a user preference rating for a selection upon determining that a user has replayed the selection.Type: ApplicationFiled: August 22, 2006Publication date: May 29, 2008Inventors: William Edward Atherton, Daniel Otto Becker, James Gordon McLean, Aaron Eliahu Merkin, David B. Rhoades
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Patent number: 7284084Abstract: A method and system for booting up multiple PCI peripheral devices, such that the number of bootable PCI peripheral devices is not limited by the amount of computer system memory that is dedicated to storing executable boot code for the peripheral devices. The executable boot code is stored on a Read Only Memory (ROM) on each peripheral device. When a new PCI peripheral device begins to boot up, a check for available memory space in a ROM scan memory address space is performed. If there is not enough available room in the ROM scan memory address space for the new device's executable boot code, then a ROM scan detection logic pages an image of another peripheral device's executable boot code out of the ROM scan memory address space before storing the new device's executable boot code into the ROM scan memory address space.Type: GrantFiled: August 30, 2004Date of Patent: October 16, 2007Assignee: International Business Machines CorporationInventors: William Edward Atherton, Daryl Carvis Cromer, Richard Alan Dayan, Scott Neil Dunham, Eric Richard Kern, Howard Jeffrey Locker, William Bradley Schwartz, Adam Lee Soderlund
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Patent number: 7000087Abstract: A method and system for allocating pre-selected physical memory locations to an application executing on a data processing system. Memory allocation subroutines, interacting with the programming interfaces of the operating system (OS), allocates and looks down blocks of memory. The memory allocation subroutines then de-allocates the memory blocks based on whether or not the memory blocks fall within the pre-selected range of physical memory locations. The physical memory locations of the blocks locked down are discovered using the driver. The driver takes the virtual address of the specified memory locations and returns with a corresponding physical address. The memory allocation subroutines provide functions that allow the program developer to specify the number of physical pages to allocate and a range of physical addresses and comprises algorithm(s) that allocates the physical memory within the selected range.Type: GrantFiled: November 7, 2001Date of Patent: February 14, 2006Assignee: International Business Machines CorporationInventors: William Edward Atherton, Raghunath Reddy Kallem, David James Rudda, Jr., David C. Wu
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Patent number: 6961794Abstract: A data processing system and method analyze the performance of its components by obtaining measures of usage of the components over time as well as electrical requirements of those components to recommend an optimal configuration. The location in the system and the time duration that any one or more components is in a performance-limiting or bottleneck condition is determined. Based on the observed bottlenecks, their times of occurrence and their time duration, more optimal configurations of the system are recommended. The present invention is particularly adapted for use in data processing systems where a peripheral component interconnect (PCI) bus is used.Type: GrantFiled: September 21, 2001Date of Patent: November 1, 2005Assignee: International Business Machines CorporationInventors: William Edward Atherton, Randal Lee Bertram, Gregory Joseph McKnight, William Joseph Piazza
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Patent number: 6941450Abstract: A system and method for implementing a system optimizer utilized to determine if a current configuration of a data processing system is optimized for system performance according to testing criteria. If the current configuration is not optimized, alternate configurations are generated and analyzed to find at least one optimized alternate configuration. If an optimized alternate configuration is found, the system optimizer notifies a user. However, if at least one optimized alternate configuration is not found, the testing criteria is altered and the set of generated alternate configurations are analyzed utilizing the altered testing criteria.Type: GrantFiled: July 30, 2001Date of Patent: September 6, 2005Assignee: International Business Machines CorporationInventors: William Edward Atherton, Gregory Joseph McKnight, William Joseph Piazza
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Publication number: 20030097536Abstract: A method and system for allocating pre-selected physical memory locations to an application executing on a data processing system. A kernel mode driver and memory allocation subroutines are provided. The memory allocation subroutines, interacting with the programming interfaces of the OS allocates and locks down blocks of memory. The memory allocation subroutines then deallocates the memory blocks based on whether or not the memory blocks fall within the pre-selected range of physical memory locations. The physical memory locations of the blocks locked down are discovered using the driver. The driver takes the virtual address of the specified memory locations and returns with a corresponding physical address. This process involves the use of AWE APIs of the OS, which allows the physical memory to be locked down. The memory allocation subroutines provides functions that allow the program developer to specify the number of physical pages to allocate and a range of physical addresses.Type: ApplicationFiled: November 7, 2001Publication date: May 22, 2003Applicant: International Business Machines CorporationInventors: William Edward Atherton, Raghunath Reddy Kallem, David James Rudda, David C. Wu
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Publication number: 20030061324Abstract: A data processing system and method analyze the performance of its components by obtaining measures of usage of the components over time as well as electrical requirements of those components to recommend an optimal configuration. The location in the system and the time duration that any one or more components is in a performance-limiting or bottleneck condition is determined. Based on the observed bottlenecks, their times of occurrence and their time duration, more optimal configurations of the system are recommended. The present invention is particularly adapted for use in data processing systems where a peripheral component interconnect (PCI) bus is used.Type: ApplicationFiled: September 21, 2001Publication date: March 27, 2003Applicant: International Business Machines CorporationInventors: William Edward Atherton, Randal Lee Bertram, Gregory Joseph McKnight, William Joseph Piazza
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Publication number: 20030023841Abstract: A system and method for implementing a system optimizer utilized to determine if a current configuration of a data processing system is optimized for system performance according to testing criteria. If the current configuration is not optimized, alternate configurations are generated and analyzed to find at least one optimized alternate configuration. If an optimized alternate configuration is found, the system optimizer notifies a user. However, if at least one optimized alternate configuration is not found, the testing criteria is altered and the set of generated alternate configurations are analyzed utilizing the altered testing criteria.Type: ApplicationFiled: July 30, 2001Publication date: January 30, 2003Applicant: International Business Machines CorporationInventors: William Edward Atherton, Gregory Joseph McKnight, William Joseph Piazza