Patents by Inventor Edward Beili

Edward Beili has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180124445
    Abstract: Systems, devices and processes for massive file replication as described. A distributed file system has a distributed storage servers for storing private copies of shared media files. One or more replicators generate the replicas or private copies of media files. For example, the replicator reads a media file. The replicator creates a private copy of the media file in response to a replication request. The replication request specifies a convention for generating a reference for the private copy of the media file. The replicator writes the private copy of the media file to a storage server of the distributed storage servers. The replicator generates the reference for the copy of the media file based on the convention and the storage server. The replicator transmits metadata the distributed file system, the metadata indicating the reference for the copy of the media file.
    Type: Application
    Filed: October 31, 2016
    Publication date: May 3, 2018
    Inventors: EDWARD BEILI, Oren HENCINSKI
  • Patent number: 8837531
    Abstract: A system and method for transmitting and recovering external clock signals over links of a DSL system in which the external clock signals are used to synchronize transmitted physical layer signals from a CO of a DSL system and said external clock signals are derived from the received physical layer signals at an RT/CPE location of a DSL system. A clock recovery subsystem located at both the CO and the RT/CPE comprises a clock monitor circuit in communication with a Phase Lock Loop circuit. The clock monitor circuit at the RT/CPE is able to derive clock signals from the received physical layer signals and select one of said derived clocks to which a local reference clock at the RT/CPE is synchronized. The synchronized local reference clock, which can exist even when there are no valid derived clocks, may be used to transmit pseudowire frames (e.g., TDM data over Ethernet).
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: September 16, 2014
    Assignee: Actelis Networks (Israel) Ltd.
    Inventors: Edward Beili, Mauricio Nurko
  • Publication number: 20110261842
    Abstract: A system and method for transmitting and recovering external clock signals over links of a DSL system in which the external clock signals are used to synchronize transmitted physical layer signals from a CO of a DSL system and said external clock signals are derived from the received physical layer signals at an RT/CPE location of a DSL system. A clock recovery sub-system located at both the CO and the RT/CPE comprises a clock monitor circuit in communication with a Phase Lock Loop circuit. The clock monitor circuit at the RT/CPE is able to derive clock signals from the received physical layer signals and select one of said derived clocks to which a local reference clock at the RT/CPE is synchronized. The synchronized local reference clock, which can exist even when there are no valid derived clocks, may be used to transmit pseudowire frames (e.g., TDM data over Ethernet).
    Type: Application
    Filed: April 7, 2009
    Publication date: October 27, 2011
    Inventors: Edward Beili, Mauricio Nurko