Patents by Inventor Edward C. Bee

Edward C. Bee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5528303
    Abstract: An integrated active filter and sync separator circuit operates on precision internal reference sources to set the filter cut off frequency as a function of resistance of an external resistor. The active filter eliminates the source of sync tip crushing attributable to conventional clamping circuits associated with sync pulse detectors, and also provides sync pulses substantially devoid of time-variant jitter.
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: June 18, 1996
    Assignee: Elantec, Inc.
    Inventors: Edward C. Bee, Stephen F. Colaco
  • Patent number: 5475343
    Abstract: A class AB complementary output stage provides maximum output voltage swings and high load currents with minimum power dissipation. The output stage includes a first bias circuit that generates a pair of voltage nodes with a resistor controlled bias current. A second bias circuit comprises four current sources the outputs of which are coupled pair-wise across a resistor to form a pair of high impedance nodes at the resistor terminals. The voltage nodes of the first bias circuit establish bias currents in a differential input stage and in a pair of current sources of the second bias circuit. The outputs of the differential input stage drive the inputs of second pair of current sources in the second bias circuit, which provide drive current to the high impedance nodes. The output circuit comprises a pair of complementary common source transistors, the gates (bases) of which are driven by the high impedance nodes of the second bias circuit.
    Type: Grant
    Filed: August 15, 1994
    Date of Patent: December 12, 1995
    Assignee: Elantec, Inc.
    Inventor: Edward C. Bee
  • Patent number: 5469104
    Abstract: An active folded cascode includes an amplifier transistor and a source follower transistor configured as a folded cascode with the drain of the amplifier transistor and the source of the follower transistor connected to form a gain node. A feedback transistor has its gate and drain connected to the source and gate of the follower transistor while bias current provided to the drain of the feedback transistor by a current source maintains the gain node at a fixed voltage with respect to a reference voltage. Coupling of the voltage at the gain node to the gate of the source follower transistor by the feedback transistor reduces the effective source impedance of the source follower transistor, providing improved gain and bandwidth properties for the active folded cascode circuit.
    Type: Grant
    Filed: March 28, 1994
    Date of Patent: November 21, 1995
    Assignee: Elantec, Inc.
    Inventors: Douglas S. Smith, Edward C. Bee
  • Patent number: 5426396
    Abstract: A multiplexer circuit includes pairs of control elements such as CMOS transistors serially connected between common circuit nodes to conduct current therebetween in response to one of each pair of control elements being selectively biased to conductive or non-conductive states by an applied control signal. The current enabled to flow between circuit nodes through a pair of control elements biased to conductive state is determined by the magnitude of an applied signal, and a current-difference circuit compares the current flowing between circuit nodes with a reference current to produce an output signal representative of the applied signal which is selected in response to an applied control signal.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: June 20, 1995
    Assignee: Elantec, Inc.
    Inventor: Edward C. Bee
  • Patent number: 4349755
    Abstract: A circuit for detecting when the product of two independent currents equals or exceeds a predetermined upper limit is disclosed. The circuit includes a load current source for providing a load current for defining the predetermined upper limit; a differential amplifier including first and second transistors having their emitters connected in common to an emitter current source, wherein the collector of the first transistor is connected to the load current source for providing an output signal at the collector that changes state when the collector current is not less than the load current; a first combination of components for providing a voltage signal at the base of the first transistor that is representative of the natural logarithm of the reciprocal of a first independent current; and a second combination of components for providing a voltage signal at the base of the second transistor that is representative of the natural logarithm of a second independent current.
    Type: Grant
    Filed: February 11, 1980
    Date of Patent: September 14, 1982
    Assignee: National Semiconductor Corporation
    Inventor: Edward C. Bee