Patents by Inventor Edward E. Sprague

Edward E. Sprague has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9800495
    Abstract: A method, performed in a network that includes a group of nodes, includes identifying a path through a set of the nodes, where each node, in the set of nodes, has a data plane and a control plane; establishing a control plane tunnel, associated with the path, within the control plane of the nodes in the set of nodes; establishing a data plane tunnel, associated with the path, within the data plane of the nodes in the set of nodes, where the data plane tunnel is associated with the control plane tunnel and established through the same set of nodes; and transmitting a control message through the control plane tunnel to change a state of the data plane tunnel.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: October 24, 2017
    Assignee: Infinera Corporation
    Inventors: Biao Lu, Jan Bialkowski, Edward E. Sprague, Parthiban Kandappan
  • Patent number: 9485015
    Abstract: A method for receiving, by circuitry of an optical node adapted for wavelength multiplexing and wavelength switching, a signal over OSC comprising overhead information indicative of status of at least one of an optical layer in an OTN; wherein the signal utilizes OC-N frame format comprising a first STS frame, a second STS frame, and a third STS frame, the STS frames having a format wherein the information is assigned to a number of bits designated for OAM information, wherein the bits are assigned to bytes within a transport overhead portion of the STS frame format within the OC-N frame format; terminating, by circuitry of the optical node, the signal at the optical node; and notifying, by circuitry of the optical node, software of the status of the optical layer in the OTN.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: November 1, 2016
    Assignee: Infinera Corporation
    Inventors: Rajan Rao, Edward E. Sprague, Biao Lu, Sharfuddin Syed
  • Patent number: 9225446
    Abstract: A client receive circuit receives client data from a network, decodes the client data and stores the client data within the memory. A frame transmit circuit is provided that includes a justification control logic and a framer and a justification control logic is provided that 1) determines each of a plurality of fill levels and 2) determines an average of the plurality of fill levels. The framer has circuitry to generate a wrapper including a justification opportunity having data based upon a difference between the average and a predetermined threshold.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: December 29, 2015
    Assignee: Infinera Corporation
    Inventors: Arvinderpal S. Wander, Edward E. Sprague, Mallikarjun Chillal, Prasad Paranjape, Yeongho Park, Michael Kutty K. G.
  • Patent number: 8848720
    Abstract: A propagation delay in the transmission of a frame from an initiator node to a peer node is determined by initially identifying a frame number and byte offset of a first incoming frame from the peer node at a time when the initiator node outputs a portion of a transmitted frame. The portion of the transmitted frame may be the first byte of a sub-frame within the transmitted frame. At the peer node, the frame number and byte offset of a second frame to be supplied to the initiator node is identified at a later time when the frame portion transmitted by the initiator node is received by the peer node, and such information is transmitted to the initiator node. Thus, since the frames output and received by the initiator node are typically of fixed duration, the frame number and byte offset of the incoming frame represent the time when the initiator node outputs the frame portion (a transmit time).
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: September 30, 2014
    Assignee: Infinera Corporation
    Inventors: Vinod Narippatta, Edward E. Sprague, Ting-Kuang Chiang, Chung Kuang Chin
  • Patent number: 8660020
    Abstract: Embodiments of the present invention compensate for skew across a wavelength division multiplexed network. The network is a wavelength division multiplexed optical transport network. The skew compensation can be performed electrically or optically. It can be performed on the transmission side of the network, the receiver side of the network or at any intermediary node on the network.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: February 25, 2014
    Assignee: Infinera Corporation
    Inventors: Drew D. Perkins, David F. Welch, Ting-Kuang Chiang, Edward E. Sprague, Parthiban Kandappan, Stephen G. Grubb, Prasad Paranjape
  • Patent number: 8638817
    Abstract: Consistent with the present disclosure, a communication system is provided in which client data is received and provided in frames for transmission within the system. The frames include an overhead portion as well as locations that include the client data. The frames further include phase data or “virtual justifications” that periodically correct the difference between the phase represented by the data locations in the wrapper and the actual accumulated client phase. The phase data or virtual justifications, however, are decoupled from the data path. Therefore, without complicating the data path, the phase data may be sent more frequently and with finer granularity than the actual justifications. Virtual justifications or phase data are communicated via a “virtual justification control channel” which may part of the frame overhead. Moreover, there is no need for an actual “virtual justification opportunity” in the frame, because no data is actually sent in conjunction with the virtual justifications.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: January 28, 2014
    Assignee: Infinera Corporation
    Inventor: Edward E. Sprague
  • Patent number: 8477596
    Abstract: A line card in a network node having a local memory coupled to a local controller and local logic circuit. The local memory in the line card stores state information for signals processed by the line card itself, as well as state information for signals processed by other line cards. The logic circuit and controller implement a same fault detection and signal processing algorithms as all other line cards in the group, to essentially effectuate a distributed and local hardware based control of automatic protection switching (APS) without interrupting a central processor. The line card also performs error checking and supervisory functions to ensure consistency of state among the line cards.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: July 2, 2013
    Assignee: Infinera Corporation
    Inventors: Tjandra Trisno, Edward E. Sprague, Scott A. Young
  • Patent number: 8446906
    Abstract: A method includes receiving client data; extracting overhead data from the client data; mapping the client data into one or more frames, where each of the one or more frames has a frame payload section and a frame overhead section, where the client data is mapped into the frame payload section of the one or more frames; inserting the overhead data into the frame overhead section of the one or more frames; transporting the one or more frames across a network; extracting the overhead data from the frame overhead section of the one or more frames; recovering the client data from the one or more frames; inserting the extracted overhead data into the recovered client data to create modified client data; and outputting the modified client data.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: May 21, 2013
    Assignee: Infinera Corporation
    Inventors: Edward E. Sprague, Radhakrishna Valiveti, Jan Bialkowski, Ting-Kuang Chiang, Biao Lu, Rajan Rao, Parthiban Kandappan
  • Publication number: 20130121685
    Abstract: A method for receiving, by circuitry of an optical node adapted for wavelength multiplexing and wavelength switching, a signal over OSC comprising overhead information indicative of status of at least one of an optical layer in an OTN; wherein the signal utilizes OC-N frame format comprising a first STS frame, a second STS frame, and a third STS frame, the STS frames having a format wherein the information is assigned to a number of bits designated for OAM information, wherein the bits are assigned to bytes within a transport overhead portion of the STS frame format within the OC-N frame format; terminating, by circuitry of the optical node, the signal at the optical node; and notifying, by circuitry of the optical node, software of the status of the optical layer in the OTN.
    Type: Application
    Filed: April 20, 2012
    Publication date: May 16, 2013
    Inventors: Rajan Rao, Edward E. Sprague, Biao Lu, Sharfuddin Syed
  • Patent number: 8442040
    Abstract: The present invention provides a system, apparatus and method for modularly adapting a network node architecture to function in one of a plurality of potential node types. The architecture includes a configurable switching element, integrated optics, and a plurality of modules that allow a “type” of node to be adapted and configured within the base architecture. The module interfaces may be optical or electrical and be used to construct various different types of nodes including regenerators, add/drop nodes, terminal nodes, and multi-way nodes using the same base architecture.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 14, 2013
    Assignee: Infinera Corporation
    Inventors: Drew D. Perkins, Ting-Kuang Chiang, Marco E. Sosa, Mark Yin, Edward E. Sprague
  • Patent number: 8412040
    Abstract: A node comprising a packet network interface, an ethernet switch, an optical port, and a distribution engine. The packet network interface adapted to receive a packet having a destination address and a first bit and a second bit. The ethernet switch is adapted to receive and forward the packet into a virtual queue associated with a destination. The optical port has circuitry for transmitting to a plurality of circuits. The distribution engine has one or more processors configured to execute processor executable code to cause the distribution engine to (1) read a first bit and a second bit from the virtual queue, (2) provide the first bit and the second bit to the at least one optical port for transmission to a first predetermined group of the plurality of circuits.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: April 2, 2013
    Assignee: Infinera Corporation
    Inventors: Radhakrishna Valiveti, Ping Pan, Ravi Tangirala, Edward E. Sprague, Rajan Rao, Biao Lu
  • Patent number: 8411708
    Abstract: A network may include an ingress node that is configured to receive a client signal having a client rate that is one of a multiple different client rates, asynchronously map the client signal into a first frame of a first rate, asynchronously map the first frame into a second frame of a second rate, and output the second frame on the network; an intermediate node that is configured to receive the second frame, recover the first frame from the second frame, asynchronously map the first frame into a third frame of a third rate, and output the third frame on the network, where the intermediate node does not recover the client signal from the first frame; and an egress node that is configured to receive the third frame, recover the first frame from the third frame, recover the client signal from the first frame, and output the client signal.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: April 2, 2013
    Assignee: Infinera Corporation
    Inventors: Ting-Kuang Chiang, Edward E. Sprague
  • Patent number: 8370706
    Abstract: An optical device transmits ECC codewords using an interleaved technique in which a single ECC codeword is transmitted over multiple optical links. In one particular implementation, the device may include an ECC circuit configured to supply ECC codewords in series, the codewords being generated by the ECC circuit based on input data and each of the codewords including error correction information and a portion of the data. The device may further include a serial-to-parallel circuit configured to receive each of the codewords in succession, and supply data units in parallel, each of the data units including information from a corresponding one of the codewords; an interleaver circuit to receive the data units in parallel and output a second data units in parallel, each of the second data units including bits from different ones of the data units; and a number of output lines, each of which supplying a corresponding one of the second data units.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: February 5, 2013
    Assignee: Infinera Corporation
    Inventors: Chung Kuang Chin, Edward E. Sprague, Swaroop Raghunatha
  • Patent number: 8300479
    Abstract: Consistent with the present disclosure, a plurality of FIFO buffers, for example, are provided in a switch, which also includes a switch fabric. Each of the plurality of FIFOs is pre-filled with data for a duration based on a skew or time difference between the time that a data unit group is supplied to its corresponding FIFO and a reference time. The reference time is the time, for example, after a delay period has lapsed following the leading edge of a synch signal, the timing of which is a known system parameter and is used to trigger switching in the switch fabric. Typically, the delay period may be equal to the latency (often, another known system parameter) or length of time required for the data unit to propagate from an input circuit, such as a line card of the switch or another switch, to the FIFO that receives the data unit. At the reference time, temporally aligned data unit groups may be read or output from each FIFO and supplied to the switch fabric.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 30, 2012
    Assignee: Infinera Corporation
    Inventors: Chung Kuang Chin, Edward E. Sprague, Prasad Paranjape, Swaroop Raghunatha, Venkat Talapaneni
  • Publication number: 20120251106
    Abstract: A node comprising a packet network interface, an ethernet switch, an optical port, and a distribution engine. The packet network interface adapted to receive a packet having a destination address and a first bit and a second bit. The ethernet switch is adapted to receive and forward the packet into a virtual queue associated with a destination. The optical port has circuitry for transmitting to a plurality of circuits. The distribution engine has one or more processors configured to execute processor executable code to cause the distribution engine to (1) read a first bit and a second bit from the virtual queue, (2) provide the first bit and the second bit to the at least one optical port for transmission to a first predetermined group of the plurality of circuits.
    Type: Application
    Filed: April 4, 2011
    Publication date: October 4, 2012
    Inventors: Radhakrishna Valiveti, Ping Pan, Ravi Tangirala, Edward E. Sprague, Rajan Rao, Biao Lu
  • Patent number: 8274892
    Abstract: A transmission network includes network elements which accept client signals to be transported over a transmission network, particularly an optical transmission network, each of the client signals having one of a plurality of payload rates. The client signals are digitally mapped into first transport frames and, subsequently, digitally mapped into second transport frames for transport across the network infrastructure. The second transport frames having a universal frame rate throughout the transmission network infrastructure supporting a client signal of any frequency, whether the client signal includes a standard client payload or a proprietary client payload.
    Type: Grant
    Filed: June 16, 2005
    Date of Patent: September 25, 2012
    Assignee: Infinera Corporation
    Inventors: Ting-Kuang Chiang, Drew D. Perkins, Edward E. Sprague, Daniel P. Murphy
  • Patent number: 8259703
    Abstract: Embodiments of the present invention determine skew relative to a plurality of communication paths on a network system. The network is a wavelength division multiplexed optical transport network. The plurality of communication paths involves different signal and path attributes such as a plurality of carrier wavelengths, optical carrier groups, physical communication paths (different nodes, different fibers along a same path, or any combination of the foregoing), or any other differentiating factors between two paths.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: September 4, 2012
    Assignee: Infinera Corporation
    Inventors: Drew D. Perkins, David F. Welch, Ting-Kuang Chiang, Edward E. Sprague, Parthiban Kandappan, Steven G. Grubb, Prasad Paranjape, Biao Lu
  • Patent number: 8223803
    Abstract: A network device may include a set of switches. Each of the switches may include a set of ingress links and a set of egress links. One of the switches may store mapping information that identifies a first timeslot and one of the egress links for data received, during a second timeslot, on one of the ingress links. The one of the switches may receive data, associated with the second timeslot, on the one of the ingress links, identify the first timeslot and the one of the egress links, associated with the second timeslot and the one of the ingress links, based on the mapping information, and output the data, during the first timeslot, on the one of the egress links.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: July 17, 2012
    Assignee: Infinera Corporation
    Inventor: Edward E. Sprague
  • Publication number: 20120144059
    Abstract: A mapping system including a memory, a client receive circuit and a frame transmit circuit. The client receive circuit is adapted to receive client data from a network, decode the client data and store the client data within the memory. The frame transmit circuit includes a justification control log and a framer. The justification control logic is executed by one or more processor to 1) determine each of a plurality of fill levels, each of the plurality of fill levels being associated with an amount of client data in the memory at each of a plurality of corresponding one of a plurality of instants of time, and 2) determine an average of the plurality of fill levels. The framer has circuitry to generate a wrapper including at least a portion of client data from the memory, the wrapper having one or more justification opportunity having data based upon a difference between the average and a predetermined threshold. The mapping system can be an asynchronous mapping system.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Inventors: Arvinderpal S. Wander, Edward E. Sprague, Mallikarjun Chillal, Prasad Paranjape, Yeongho Park, Michael Kutty K.G.
  • Patent number: 8175113
    Abstract: Embodiments of the present invention route a wavelength division multiplexed signal across multiple communication paths using skew characteristics of at least some of the communication paths. The network is a wavelength division multiplexed optical transport network. The plurality of communication paths involves different signal and path attributes such as a plurality of carrier wavelengths, optical carrier groups, physical communication paths (different nodes, different fibers along a same path, or any combination of the foregoing), or any other differentiating factors between two paths.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: May 8, 2012
    Assignee: Infinera Corporation
    Inventors: Drew D. Perkins, David F. Welch, Ting-Kuang Chiang, Charles H. Joyner, Edward E. Sprague, Parthiban Kandappan, Stephen Grubb, Prasad Paranjape