Patents by Inventor Edward Grochowski

Edward Grochowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5535347
    Abstract: A circuit for determining the length of an instruction including apparatus for providing a sequence of instruction bytes greater than a single instruction length, rotator apparatus for selecting a sequential number of instruction bytes for decoding commencing at a byte which begins a first instruction, control apparatus for operating the rotator, and apparatus responsive to a decoded length value derived from the first instruction for causing the control apparatus to cause the rotator to rotate to the beginning of a next instruction.
    Type: Grant
    Filed: November 7, 1994
    Date of Patent: July 9, 1996
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Ahmad Zaidi, James Lan
  • Patent number: 5450605
    Abstract: The specification discloses a method and apparatus for determining the length of variable-length instructions that appear sequentially in an instruction stream without differentiation. The apparatus may be used to facilitate parallel processing of such variable-length instructions by a computer system.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: September 12, 1995
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Kenneth Shoemaker, Uri Weiser, Doron Orenstein
  • Patent number: 4985640
    Abstract: A circuit for generating a pair of clock pulses of opposite phases each having the same frequency as the frequency of an input signal generated by a crystal oscillator including apparatus for generating first and second pair of signals at half the frequency of the input signal generated by a crystal oscillator, the signals of each pair being of opposite phase to one another; apparatus for comparing a first signal of the first pair signals with the one of the signals of the second pair of signals which is normally out of phase therewith to produce an output signal only when the two signals are in phase; apparatus for comparing the second signal of the first pair of signals with the one of the signals of the second pair of signals which is normally out of phase therewith to produce an output signal only when the two signals are in phase; apparatus utilizing one of the output signals to lengthen the duty cycle of one of the first pair of signals of opposite phases and the other of the output signals to shorten t
    Type: Grant
    Filed: April 4, 1990
    Date of Patent: January 15, 1991
    Assignee: Intel Corporation
    Inventors: Edward Grochowski, Rajesh Gupta