Abstract: A buffer circuit interfaces between a bus request conductor coupled to a processor and a bus request terminal of a first circuit that is capable of asserting control over a data bus coupled to the processor. The buffer circuit includes a flip-flop that stores a state indicative of whether the first circuit is monitoring or driving its bus request terminal. The buffer circuit also includes circuitry that reproduces the logic level of the bus request conductor on the bus request terminal of the first circuit if the flip-flop contents indicate monitoring by the first circuit and reproduces the logic level of the bus request terminal on the bus request conductor if the flip-flop contents indicate driving by the first circuit.

Abstract: A field maintenance processor including a microprocessor that effects transparent refreshing of a dynamic memory includes a counter circuit which times the duration of the "wait" signal produced by a slow memory or a slow peripheral device accessed by the processor. The counter circuit produces a "wait enable" signal which enables the "wait" signal to produce an "enabled wait" signal that is conducted to a wait input of the processor for only a predetermined time, to ensure transparent refreshing of the entire dynamic memory. If the "wait" signal produced by the slow memory device has not ceased when the predetermined time has elapsed, the "wait enable" signal disappears, causing the "enabled wait" signal also to disappear. The disappearance of the "wait enable" signal also causes a "wait interrupt" signal to be generated and transmitted to the microprocessor, resulting in execution of an interrupt routine to determine which instruction execution was earlier halted in response to the "enabled wait" signal.

Abstract: Portable tester and method for testing a variety of circuit boards without utilizing adaptor boards for re-routing input test signals and supply voltage from the tester to pins of the board under test. A plurality of edge adaptors having different pin spacings have their respective pins connected in parallel to corresponding edge connector stake pins. Each edge connector stake pin is connected to or isolated from the corresponding driver/sensor stake pin by means of a switch. Each driver/sensor stake pin is connected to the input/output terminal of a programmable driver/sensor circuit. A plurality of power supply stake pins are connected to various power supplies of the portable tester. Connectors coupled to the family board can be utilized to route power supply voltages to electrically isolated edge connector stake pins. Isolated driver/sensor outputs can be routed to other edge connector stake pins.