Abstract: A method and apparatus for measuring the barrier height distribution in an insulated gate field effect transistor by intermittently illuminating a partially transparent gate electrode under bias while applying varying back gate biases to the hack gate electrode and measuring the currents conducted by the gate electrode and by the connected source and drain electrodes. Based upon the inverse Laplace transform of the ratio of the measured currents, the barrier height distribution in the transistor, including the average barrier height and the variance of the distribution of barrier heights, typically a Gaussian distribution, may be determined. A method and apparatus for adjusting the gate bias to compensate for variations in the electric field in the insulator layer due to charge generation in the insulator layer is also provided. In addition, the method and apparatus also provides for measuring the photocurrent collected under the gate electrode.

Abstract: The doping density profile and thus the process-related parameters which control the operation and performance of a semiconductor layer, such as that in metal-insulator-semiconductor (MIS) device are reliably determined by determining the difference in the measured and calculated band bendings of a semiconductor layer in accumulation mode. In addition, high and low frequency C-V measurements of the MIS device are performed in order to calculate a second band bending and to approximate the doping density profile of the semiconductor layer. Based upon the approximated doping density profile, an approximate band bending curve is generated. The difference between the approximate and second band bending curves is then compared to the difference between the measured and calculated band bendings of the semiconductor layer in accumulation to determine the variance therebetween.

Abstract: A method and apparatus for measuring the barrier height distribution in an insulated gate field effect transistor by intermittently illuminating a partially transparent gate electrode under bias while applying varying back gate biases to the back gate electrode and measuring the currents conducted by the gate electrode and by the connected source and drain electrodes. Based upon the inverse Laplace transform of the ratio of the measured currents, the barrier height distribution in the transistor, including the average barrier height and the variance of the distribution of barrier heights, typically a Gaussian distribution, may be determined. A method and apparatus for adjusting the gate bias to compensate for variations in the electric field in the insulator layer due to charge generation in the insulator layer is also provided. In addition, the method and apparatus also provides for measuring the photocurrent collected under the gate electrode.

Abstract: The internal grain boundaries and intergranular spaces of polycrystalline semiconductor material may be passivated with an amorphous material, to substantially eliminate the dangling bonds at the internal grain boundaries. The passivated polycrystalline material of the present invention exhibits a lower electrically active defect density at the grain boundaries and intergranular space compared to unpassivated polycrystalline material. Moreover, large classes of amorphous passivating materials may be used for each known semiconductor material so that the passivating process may be readily adapted to existing process parameters and other device constraints. Passivated polycrystalline material may be employed to form the well or low energy bandgap layer of a quantum well device or superlattice, while still maintaining the required tunneling effect.

Abstract: Disclosed is a feedback regulated oscillator which comprises a reference signal source, a variable local oscillator, a converter responsive to the variable local oscillator for developing a signal, compatible with the signal of the reference source, having a magnitude which is responsive to the frequency of the local oscillator, and a comparator, responsive to the reference signal source and to the converter, for controlling the frequency of the variable local oscillator.

Abstract: In a metal-insulator-semiconductor (MIS) structure, the I-layer comprises a single-crystal, semi-insulating layer which forms a substantially lattice-matched heterojunction with the underlying S-layer. Illustratively, the structure, grown by MBE, includes an indirect gap AlGaAs I-layer doped with a deep level impurity such as oxygen, iron or chromium, and a GaAs S-layer. GaAs FETs incorporating this MIS structure are described.