Patents by Inventor Edward H. Welbon

Edward H. Welbon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5768152
    Abstract: Disclosed is a system and method of providing performance analysis on integrated circuit devices and systems using an IEEE JTAG 1149.1 interface. An integrated circuit device is described that includes an execution control register for receiving a control code from an external device via the JTAG interface, a means for selecting and coupling to one or more specific logic circuits on the device, one or more counters for recording specific events occurring on the logic circuits, and a counter register for managing the counter data and outputting it via the JTAG interface.
    Type: Grant
    Filed: August 28, 1996
    Date of Patent: June 16, 1998
    Assignee: International Business Machines Corp.
    Inventors: Robert P. Battaline, James R. Robinson, Edward H. Welbon, Ralph J. Williams
  • Patent number: 5557548
    Abstract: A method and system are disclosed which monitor specified events among the number of events within a data processing system. The system of the present invention includes a software writable control register which specifies the events within the data processing system which are to be monitored, hardware for monitoring the specified events, and logic for detecting each occurrence of a specified event. In addition, the system of the present invention includes a number of counters which incrementally advance in response to an occurrence of a specified event, wherein, in response to a setting of the control register, at least one of the counters is programmed to incrementally advance in response to an overflow from a second counter. By selectively linking the counters in this manner, the maximum number of occurrences which may be counted by the counters may be dynamically altered.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: September 17, 1996
    Assignee: International Business Machines Corporation
    Inventors: Frank C. Gover, Frank E. Levine, Edward H. Welbon
  • Patent number: 5446876
    Abstract: An improved instruction tracing mechanism provides a combination of hardware, internal to the CPU, and novel software. Additional registers are added to interconnected to the CPU. These registers store values indicating the instruction address, data address, whether the instruction was a load or store, the number of bytes moved and whether any address mapping changes occurred. The registers are read by a trace interrupt handler which then provides the information to a trace buffer and a profile buffer. The end user can then access the trace and profile information through the input/output (I/O) system of the data processing system.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: August 29, 1995
    Assignee: International Business Machines Corporation
    Inventors: Frank E. Levine, Brian C. Twichell, Edward H. Welbon