Patents by Inventor Edward Hsien-Sheng Hsing

Edward Hsien-Sheng Hsing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multilevel interconnect structure for integrated circuits
    Patent number: 6011311
    Abstract: A multilevel interconnect structure includes a lower conducting layer, a dielectric layer formed on the lower conducting layer, an upper conducting layer formed partly on the dielectric layer, and an I-shaped via plug for electrically connecting the lower conducting layer and the upper conducting layer. The I-shaped via plug has an upper portion which laterally extends into the upper conducting layer, and a lower portion which undercuts the lower conducting layer.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: January 4, 2000
    Assignee: Nan Ya Technology Corporation
    Inventors: Edward Hsien-Sheng Hsing, Jen-Der Hong