Abstract: An integrated circuit device can include at least a first body bias circuit configured to generate a first body bias voltage different from power supply voltages of the IC device; at least a first bias control circuit configured to set a first body bias node to a first power supply voltage, and subsequently enabling the first body bias node to be set to the first body bias voltage; and a plurality of first transistors having bodies connected to the first body bias node.

Abstract: An integrated circuit can include at least one slew generator circuit comprising at least one body biasable reference transistor, the slew generator circuit configured to generate at least a first signal having a slew rate that varies according to characteristics of the reference transistor; a pulse generator circuit configured to generate a pulse signal having a first pulse with a duration corresponding to the slew rate of the first signal; and a counter configured to generate a count value corresponding to a duration of the first pulse.

Abstract: An integrated circuit device can include at least a first body bias circuit configured to generate a first body bias voltage different from power supply voltages of the IC device; at least a first bias control circuit configured to set a first body bias node to a first power supply voltage, and subsequently enabling the first body bias node to be set to the first body bias voltage; and a plurality of first transistors having bodies connected to the first body bias node.

Abstract: An integrated circuit can include at least one slew generator circuit comprising at least one body biasable reference transistor, the slew generator circuit configured to generate at least a first signal having a slew rate that varies according to characteristics of the reference transistor; a pulse generator circuit configured to generate a pulse signal having a first pulse with a duration corresponding to the slew rate of the first signal; and a counter configured to generate a count value corresponding to a duration of the first pulse.

Abstract: An integrated circuit can include at least one slew generator circuit comprising at least one body biasable reference transistor, the slew generator circuit configured to generate at least a first signal having a slew rate that varies according to characteristics of the reference transistor; a pulse generator circuit configured to generate a pulse signal having a first pulse with a duration corresponding to the slew rate of the first signal; and a counter configured to generate a count value corresponding to a duration of the first pulse.

Abstract: An integrated circuit device can include at least a first bi-directional biasing circuit having a first substrate portion containing a plurality of first transistors; a first control digital-to-analog converter (DAC) to generate any of a plurality of first target values in response to a first target code; a first detect circuit configured to generate a difference value between the first target values and a first limit value; and at least a first charge pump circuit configured to drive the first substrate portion between a forward body bias voltage and a reverse body bias voltage for the first transistors in response to first target values. Embodiments can also include a performance monitor section configured to determine a difference between the voltage of the first substrate portion and a target voltage. Control logic can generate first code values in response to the difference between the voltage of the first substrate portion and the target voltage. Methods are also disclosed.

Abstract: An improved floating gate photosensor is operable in either an enhanced voltage sensitivity mode or an enhanced transit speed mode. This photosensor has a floating gate assembly that includes two overlapping, independent and complementary-shaped gate electrodes connected to separate circuits as a means of controlling the depth of the channel in which the signal charge flows. As a result, the two key operating parameters of responsivity and signal transit time are variable. Structurally, each gate includes a plurality of prongs that overlap the recesses defined by the prongs of the other electrode. The photosensor may be operated in the WC (side channel) mode where the two gate electrodes are both used as floating gate sensors. In this instance the photosensor operates like that of a conventional floating gate sensor, with the width of the channel equal to that of the entire floating gate assembly and the depth of the channel being about 4 microns below the surface of the device.