Patents by Inventor Edward J. Collins

Edward J. Collins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230224213
    Abstract: In various embodiments systems and methods for managing a network switch, such as for a VLAN is disclosed. In one example, a method includes responsive to a restart of a port of a network switch, obtaining by the network switch a current policy applied to the port, determining based on a parameter associated with the current policy, to apply a default policy to the port, determining a new policy for the port by: obtaining an identifier for a device associated with the port, obtaining a key based on the identifier, the key associated with a plurality of devices of the same type as the device, and determining the new policy for the port using an association between the key and the new policy stored locally at the network switch, and applying the new policy to the port.
    Type: Application
    Filed: January 13, 2022
    Publication date: July 13, 2023
    Inventors: Bryan CROSSLAND, Edward STOCKWELL, Jeffrey HENNING, William ARGYROS, Edward J. COLLINS, IV, Jeffrey STRANDE
  • Patent number: 8407657
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: March 26, 2013
    Assignee: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Publication number: 20120217988
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate.
    Type: Application
    Filed: March 22, 2012
    Publication date: August 30, 2012
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Patent number: 8166446
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: April 24, 2012
    Assignee: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Publication number: 20090072849
    Abstract: A system for testing an electronic circuit board (ECB) having a plurality of test points in a pre-defined arrangement on a measurement device having a plurality of resources includes an interface fixture having a plurality of contact pads arranged in an array on a first surface. The contact pads can be electrically coupled to the plurality of resources of the measurement system according to a pre-defined pattern, where at least two of the contact pads are electrically coupled to one of the plurality of resources in a many-to-one relationship. The system also includes a test fixture removably attached to the first surface of the interface fixture. The test fixture includes an upper probe plate having a plurality of openings and a lower probe plate parallel to the upper probe plate. The lower probe plate includes a plurality of openings associated with the openings in the upper probe plate.
    Type: Application
    Filed: July 15, 2008
    Publication date: March 19, 2009
    Applicant: Jabil Circuit, Inc.
    Inventors: Mark A. Dickson, Edward J. Collins, Robert Gregory Jukna
  • Patent number: 7097843
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: August 29, 2006
    Assignee: MGI Pharma Biologics, Inc.
    Inventors: Robert G. Urban, Roman M. Chicz, Edward J. Collins, Mary Lynne Hedley
  • Publication number: 20040229809
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Application
    Filed: June 24, 2003
    Publication date: November 18, 2004
    Applicant: Zycos Inc., a Delaware corporation
    Inventors: Robert G. Urban, Roman M. Chicz, Edward J. Collins, Mary Lynne Hedley
  • Patent number: 6582704
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: June 24, 2003
    Assignee: Zycos Inc.
    Inventors: Robert G. Urban, Roman M. Chicz, Edward J. Collins, Mary Lynne Hedley
  • Publication number: 20010006639
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Application
    Filed: January 12, 2001
    Publication date: July 5, 2001
    Applicant: Zycos, Inc., Delaware corporation
    Inventors: Robert G. Urban, Roman M. Chiez, Edward J. Collins, Mary Lynne Hedley
  • Patent number: 6208090
    Abstract: A method to eliminate filament hot shock in lamp filaments, particularly in compact filament light sources such as high efficiency infrared reflective coated halogen lamps, during installation or during energization comprising a voltage reduction circuit that reduces the voltage applied to the lamp filaments for a predetermined period of time and a timing circuit that is activated each time the lamp is energized and controls the predetermined period of time during which the voltage reduction circuit reduces voltage applied to the lamp filaments. Optionally, a one time latch circuit may be included that enables the timing circuit upon energization and disables it after the voltage reduction circuit has operated continuously for the predetermined period of time, and forever thereafter.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: March 27, 2001
    Assignee: General Electric Company
    Inventors: Ludwig Skilskyj, Laszlo V. Lieszkovszky, Leonard E. Hoegler, Edward J. Collins
  • Patent number: 6183746
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: February 6, 2001
    Assignee: Zycos Inc.
    Inventors: Robert G. Urban, Roman M. Chicz, Edward J. Collins, Mary Lynne Hedley
  • Patent number: 6013258
    Abstract: The invention provides immunogenic peptides from the HPV type 16 E7 protein that comprise overlapping class I restricted T cell epitopes. Also disclosed are methods of administering DNA molecules encoding these peptides to a host mammal.
    Type: Grant
    Filed: October 9, 1997
    Date of Patent: January 11, 2000
    Assignee: Zycos Inc.
    Inventors: Robert G. Urban, Roman M. Chicz, Edward J. Collins, Mary Lynne Hedley
  • Patent number: 5430353
    Abstract: A lamp inlead assembly for a light source having a lamp envelope with at least one end region in which the lamp inlead assembly is sealably disposed includes and outer lead wire member to which power to the light source is coupled, an inner lead wire member to which the light generating device is connected, whether incandescent or discharge, and a thin foil member disposed therebetween on which the inner and outer lead wire members are fixedly secured. The thin foil member is constructed of molybdenum and is essentially uniform in thickness throughout.
    Type: Grant
    Filed: July 22, 1993
    Date of Patent: July 4, 1995
    Assignee: General Electric Company
    Inventors: Joseph Feldman, Walter R. Chapman, Jr., Edward J. Collins, Daniel L. Connell, Gerald A. Johnson, Benton A. Lee, William R. Walters
  • Patent number: 5162766
    Abstract: An industrial-rated circuit breaker cover is adapted for optimally receiving an advanced electronic trip unit including a keypad and display unit as well as a basic electronic trip unit providing circuit interruption facility without the keypad and display unit. The load terminals electrically connect the current sensing transformers with the external power circuit and receive the same size lugs that connect the circuit breaker with the electrical power distribution circuits.
    Type: Grant
    Filed: October 7, 1991
    Date of Patent: November 10, 1992
    Assignee: General Electric Company
    Inventors: Robert A. Morris, Irenaeus S. Panus, Roger J. Morgan, Ronald G. Pekrul, Edward J. Collin
  • Patent number: 5063506
    Abstract: A cost estimation system estimates the cost of supplying parts to a manufacturing facility. The system comprises a first database for storing cost information for various supply methods including air freight, ocean freight, land freight, warehouse storage, plant storage and material handling costs. A user selects a supply method for the parts, and has the option to select a percentage of one type of transportation and a percentage of an alternate type of transportation to serve as a back-up. A user also enters delivery frequency data indicating one or more frequencies of delivery to base a cost estimation. A computer processor then estimates the cost of supplying the parts at the one or more frequencies of delivery and the selected supply method. Finally, the cost estimates are presented to a user.
    Type: Grant
    Filed: October 23, 1989
    Date of Patent: November 5, 1991
    Assignee: International Business Machines Corp.
    Inventors: John C. Brockwell, Edward J. Collins
  • Patent number: 4410307
    Abstract: A modified conductive ink is provided for a photoflash array having a plurality of high voltage flash lamps connected to a lamp firing circuit pattern deposited on a circuit board with radiation-sensitive switches and fuse elements being connected in said circuit pattern for sequential firing of said flash lamps, said fuse elements being provided by narrowing the width of the circuit pattern at the fuse locations and undergoing thermal decomposition activated with radiation, wherein the improvement comprises a modified carbon ink containing a particulated electrically conductive material such as conductive powdered carbon incorporated therein. Increased electrical conductivity is provided at the fuse locations before thermal decomposition of the fuse elements takes place together with increased residual electrical resistance being provided by the thermally decomposed fused elements.
    Type: Grant
    Filed: November 10, 1980
    Date of Patent: October 18, 1983
    Assignee: General Electric Company
    Inventors: Edward J. Collins, Mary E. Suster
  • Patent number: 4375955
    Abstract: A flash lamp array circuit having radiation-sensitive switches and fuse elements being connected in the conductive carbon ink circuit pattern wherein each of said fuse elements comprises a plurality of spaced apart strips to provide more reliable thermal decomposition and increased electrical conductivity.
    Type: Grant
    Filed: November 10, 1980
    Date of Patent: March 8, 1983
    Assignee: General Electric Company
    Inventors: Edward J. Collins, Mary E. Suster
  • Patent number: 4344108
    Abstract: A flash lamp array having a plurality of high-voltage flash lamps in front of a reflector unit and a circuit board behind the reflector unit and carrying a plurality of circuit runs of relatively high resistance inexpensive material such as powdered carbon and including a common or "ground" circuit run connected to a lead-in wire of each lamp. The common circuit run is made wider than the other circuit runs, and preferably covers a major portion of the circuit board area. This reduces the possibility of accidental flashing of lamps by electrostatic electricity.
    Type: Grant
    Filed: September 29, 1980
    Date of Patent: August 10, 1982
    Assignee: General Electric Company
    Inventors: Edward J. Collins, Mary E. Suster, Vincent H. Weber
  • Patent number: 4290747
    Abstract: Improved fuse arrangement used with the circuit board to provide more reliable sequential firing in a flash lamp array. The circuit board includes a lamp firing circuitry along with radiation switches connected in said circuitry and a more reliable series connected fuse arrangement to cooperate with said radiation switches in the circuit operation. The individual fuse elements are constructed as an integral part of the lamp firing circuit pattern deposited on the circuit board at circuit locations wherein the underlying circuit board substrate has a thickness less than the substrate thicknesss elsewhere and desirably cooperate in raising the dielectric breakdown voltage characteristic of the fuse combination.
    Type: Grant
    Filed: November 9, 1979
    Date of Patent: September 22, 1981
    Assignee: General Electric Company
    Inventor: Edward J. Collins
  • Patent number: 4290748
    Abstract: Improved fuse elements used with the circuit board to provide more reliable sequential firing in a flash lamp array. The circuit board includes a lamp firing circuitry along with radiation switches connected in said circuitry and more reliable fuse elements cooperate with said radiation switches in the circuit operation. The improved fuse elements are constructed as an integral part of the lamp firing circuit pattern deposited on the circuit board at circuit locations wherein the underlying circuit board substrate has a thickness less than the substrate thickness elsewhere to enhance melting or thermal decomposition of the circuit board substrate.
    Type: Grant
    Filed: November 9, 1979
    Date of Patent: September 22, 1981
    Assignee: General Electric Company
    Inventors: Edward J. Collins, William A. Lenkner