Patents by Inventor Edward J. W. Whittaker

Edward J. W. Whittaker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7348847
    Abstract: A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and a second voltage in a second mode of operation to the power amplifier. The collector boost circuit uses a switch and an indicator signal for triggering the switch between the first and the second mode of operation. The second voltage is a boosted voltage greater than the first voltage and is provided during peak excursions through a boost capacitor.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: March 25, 2008
    Assignee: SiGe Semiconductor Inc.
    Inventor: Edward J. W. Whittaker
  • Publication number: 20070296504
    Abstract: A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and another voltage in a second mode of operation to the power amplifier. The collector boost circuit uses an indicator signal derived by an RF detector to switch between the first and the second mode of operation. The another voltage is a boosted voltage greater than the first voltage and is provided when required during peak excursions to prevent amplifier clipping through a boost capacitor. The another voltage is continuous and varies in accordance with the detected peak signal amplitude.
    Type: Application
    Filed: June 22, 2006
    Publication date: December 27, 2007
    Applicant: SiGe Semiconductor Inc.
    Inventors: Gordon G. Rabjohn, Johan Grundlingh, Edward J.W. Whittaker
  • Patent number: 7170265
    Abstract: A dual output voltage regulator circuit is disclosed. The output voltage regulator has a first FET and a second FET. A current source responsive to the regulated output voltage provides a current drive to the gate of the first FET in a first mode of operation and to the gate of the second FET in a second mode of operation. Further, the circuit employs switches for switchably selecting between the first mode of operation and the second mode of operation.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: January 30, 2007
    Assignee: SiGe Semiconductor Inc.
    Inventor: Edward J. W. Whittaker
  • Patent number: 7170337
    Abstract: A low voltage wide ratio current mirror circuit comprises an n times current mirror having an input port for receiving an input current and an m times current mirror coupled in series to the n times current mirror for resulting in an output current of (N*M the input current) being provided to a load where at least one of N and M is other than 1. The circuit provides precision in output current for use with a low voltage power amplifier without incurring an overhead of quiescent current. The low voltage wide ratio current mirror circuit in accordance with a second embodiment of the invention includes a voltage swing reduction circuit in order to provide increased stability thereto. In additional embodiments of the invention, the load is a differential amplification stage for providing differential amplification to differential RF input signals received at first and second RF input ports thereof.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: January 30, 2007
    Assignee: SiGe Semiconductor (U.S.), Corp.
    Inventor: Edward J. W. Whittaker
  • Patent number: 7095257
    Abstract: A low dropout (LDO) PFET regulator circuit is disclosed for operating in two modes of operation. For higher supply voltage potentials the LDO PFET regulator circuit operates normally, as supply voltage potential drops, the LDO PFET regulator operates in a second mode of operation where a decision circuit determines whether to supply a first boost current thereto in order to compensate for the reduced transimpedance of the first PFET.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: August 22, 2006
    Assignee: SiGe Semiconductor (U.S.), Corp.
    Inventor: Edward J. W. Whittaker
  • Patent number: 6903608
    Abstract: A power amplifier circuit is disclosed having a first amplification stage and a second amplification stage. The first amplification stage is biased using a controllable current source that provides a variable bias current thereto. A control circuit is provided for controlling the variable bias current in dependence upon the supply voltage and temperature of the power amplifier circuit. The control signal varies the variable bias current in dependence upon the supply voltage varying between first and second potential, where each potential supplies sufficient potential for operation of the power amplifier circuit.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: June 7, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventors: Edward J. W. Whittaker, Christopher A. Zelley
  • Patent number: 6476660
    Abstract: The present invention provides a long time constant integrator circuit as part of an integrated circuit. The integrator circuit is fully integrated on chip with no external capacitive or resistive components for enhancing the circuit's time constant. It achieves a −3 dB cut-off frequency of 1.6 Hz. The circuit is realisable on a very small area of silicon being formed by a bipolar process using npn transistors, resistive and capacitive elements. The integrator circuit comprises a transconductance stage as an input to an operational amplifier. The circuit design is fully differential and employs realisable resistors and capacitors.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: November 5, 2002
    Assignee: Nortel Networks Limited
    Inventors: Pasqualino Michelle Visocchi, Edward J W Whittaker, Robin M Flett
  • Patent number: 4644579
    Abstract: In a loudspeaking telephone the power supply to the loudspeaker amplifier is shunted by a regulator which functions as a programmable Zener diode. Under conditions of low available line current, e.g. where two similar instruments are operated in parallel at the end of a long line, the regulator voltage is reduced in value to disable the amplifier and conserve power to maintain the basic operating functions of the telephone.
    Type: Grant
    Filed: June 18, 1985
    Date of Patent: February 17, 1987
    Assignee: International Standard Electric Corporation
    Inventor: Edward J. W. Whittaker
  • Patent number: 4640993
    Abstract: A transmission chip for a telephone subscriber's instrument can be used in a variety of modes, some of which involve use with other chips. Depending on which mode is in force, different amplifiers are used. Thus for plain ordinary telephone (POT) service, amplifiers 30,35 and 43 are used, for loudspeaking mode amplifiers 30, 35 and 43 are used, for handsfree use amplifiers 35, 43 and 46 are used, while for VF "dialling" amplifier 46 is used. To save power, the control block (42) detects the mode in which the set is operating and, via a control bus, operates electronic switches to disable the amplifiers not needed.
    Type: Grant
    Filed: June 21, 1985
    Date of Patent: February 3, 1987
    Assignee: International Standard Electric Corporation
    Inventor: Edward J. W. Whittaker