Patents by Inventor Edward L. Mickler

Edward L. Mickler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100041241
    Abstract: A process for void free deposition of dielectric films over high aspect ratio structures using HDP CVD. In a dielectric liner deposition step and the etch to deposition ratio is increased and the deposition pressure is reduced to reduce the aspect ratio of the gap and to deposit a dielectric sidewall on the gap with a significant slope.
    Type: Application
    Filed: August 12, 2009
    Publication date: February 18, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Joseph A. GALLEGOS, Bill Alan WOFFORD, Edward L. MICKLER, Duofeng YUE
  • Patent number: 6740603
    Abstract: A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat (134) is deposited to protect and encapsulate the top metal interconnect layer (118). The protective overcoat (134) is patterned and etched to form bondpad windows either before or after depositing the final metal interconnect layer (136). A sinter that is normally performed after forming the bondpad windows is either omitted or the temperature of the sinter is kept at or below 350° C.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: May 25, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Steven P. Zuhoski, Mercer L. Brugler, Cameron Gross, Edward L. Mickler
  • Publication number: 20020123247
    Abstract: A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat (134) is deposited to protect and encapsulate the top metal interconnect layer (118). The protective overcoat (134) is patterned and etched to form bondpad windows either before or after depositing the final metal interconnect layer (136). A sinter that is normally performed after forming the bondpad windows is either omitted or the temperature of the sinter is kept at or below 350° C.
    Type: Application
    Filed: February 1, 2002
    Publication date: September 5, 2002
    Inventors: Steven P. Zuhoski, Mercer L. Brugler, Cameron Gross, Edward L. Mickler
  • Publication number: 20020123225
    Abstract: A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat (134) is deposited to protect and encapsulate the top metal interconnect layer (118). The protective overcoat (134) comprises silicon oxynitride. The protective overcoat (134) is patterned and etched to form bondpad windows either before or after depositing the final metal interconnect layer (136).
    Type: Application
    Filed: February 1, 2002
    Publication date: September 5, 2002
    Inventors: Steven P. Zuhoski, Mercer L. Brugler, Cameron Gross, Edward L. Mickler
  • Publication number: 20020123214
    Abstract: A method for fabricating a non-FLASH integrated circuit that minimizes Vmin shift. A protective overcoat (134) is deposited to protect and encapsulate the top metal interconnect layer (118). The protective overcoat comprises silicon nitride formed using deuterium based process gases (e.g. SiD4 and ND3) instead of hydrogen-based process gases. The protective overcoat (134) is patterned and etched to form bondpad windows either before or after depositing the final metal interconnect layer (136).
    Type: Application
    Filed: February 1, 2002
    Publication date: September 5, 2002
    Inventors: Steven P. Zuhoski, Mercer L. Brugler, Cameron Gross, Edward L. Mickler