Abstract: A message tracker having a transfer monitor, a set of registers, and at least one arithmetic unit increases performance and reliability when transmitting or receiving messages within a computer system. A set of message parameters such as a current address, a remaining length, and a communicated length are stored within the set of registers. The transfer monitor observes data transfers on a multi-tenant bus in order to detect data transfers related to the message and provide an update signal. The message parameters within the registers are updated in response to the update signal. The process of detecting and updating is repeated until the entire message is transferred, and the message tracker then informs a control processor or process that communication of the message has occurred. To facilitate message coalescing, several message trackers may share a message queue that is configured to store message parameters corresponding to completed messages.

Abstract: A method and apparatus for cache coherency in storage system is disclosed. The invention maintains cache coherency in the controller system of the storage system in a manner to minimize the performance degradation to a host system, and to allow the caches to be coherent without requiring data to be written to the backing disks. Each controller manages an area of memory on the partner controller, but the area is managed dynamically and is done with the information about the partner controller. A first controller determines which mirror cache line on a second controller to copy data into, and then mirrors the data from a first controller cache line to a second controller cache line. A message is sent from the first controller to the second controller informing the second controller of cache meta data associated with the mirror cache line so that the cache line may be added to the second controller's hash table.

Abstract: A mirror table that facilitates selective data coherency between local memory segments and remote memory segments includes a content addressable memory (CAM) and a random access memory (RAM). The CAM stores the addresses of local memory segments that are selected to be mirrored, and provides a segment index when presented with a segment address stored therein. The RAM stores one or more remote segment addresses for the mirrored segments along with additional data, and provides the remote segment addresses along with the additional data when presented with the segment index. A mirror link assembles and transmits an update packet comprising the remote segment addresses, a segment offset, the corresponding data, and the additional data to a remote destination. Each indicated remote address is updated with the corresponding data, thus maintaining data coherency between the selected local and remote memory segments.

Abstract: A message tracker having a transfer monitor, a set of registers, and at least one arithmetic unit increases performance and reliability when transmitting or receiving messages within a computer system. A set of message parameters such as a current address, a remaining length, and a communicated length are stored within the set of registers. The transfer monitor observes data transfers on a multi-tenant bus in order to detect data transfers related to the message and provide an update signal. The message parameters within the registers are updated in response to the update signal. The process of detecting and updating is repeated until the entire message is transferred, and the message tracker then informs a control processor or process that communication of the message has occurred. To facilitate message coalescing, several message trackers may share a message queue that is configured to store message parameters corresponding to completed messages.

Abstract: A mirror table that facilitates selective data coherency between local memory segments and remote memory segments includes a content addressable memory (CAM) and a random access memory (RAM). The CAM stores the addresses of local memory segments that are selected to be mirrored, and provides a segment index when presented with a segment address stored therein. The RAM stores one or more remote segment addresses for the mirrored segments along with additional data, and provides the remote segment addresses along with the additional data when presented with the segment index. A mirror link assembles and transmits an update packet comprising the remote segment addresses, a segment offset, the corresponding data, and the additional data to a remote destination. Each indicated remote address is updated with the corresponding data, thus maintaining data coherency between the selected local and remote memory segments.

Abstract: A method and apparatus for cache coherency in storage system is disclosed. The invention maintains cache coherency in the controller system of the storage system in a manner to minimize the performance degradation to a host system, and to allow the caches to be coherent without requiring data to be written to the backing disks. Each controller manages an area of memory on the partner controller, but the area is managed dynamically and is done with the information about the partner controller. A first controller determines which mirror cache line on a second controller to copy data into, and then mirrors the data from a first controller cache line to a second controller cache line. A message is sent from the first controller to the second controller informing the second controller of cache meta data associated with the mirror cache line so that the cache line may be added to the second controller's hash table.