Patents by Inventor Edward Lombardi

Edward Lombardi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11694992
    Abstract: An integrated circuit package structure is provided that includes a chip carrier substrate, at least one processor die provided on the chip carrier substrate, a plurality of lateral escape wiring lines connected to and extending away from the at least one processor die, and a plurality of chips at least partially surrounding the processor die, at least one of the chips overlapping with at least one of the lateral escape wiring lines in a plan view. An interconnect structure of the chips includes at least one vertical power feed structure that is configured and positioned not to intersect with the lateral escape wiring lines in the plan view.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: July 4, 2023
    Assignee: International Business Machines Corporation
    Inventors: Charles Leon Arvin, Bhupender Singh, Joseph C. Sorbello, Joseph Jacobi, Thomas Edward Lombardi, Shidong Li, Mark William Kapfhammer
  • Publication number: 20230197658
    Abstract: A flip chip device and methods for fabrication are provided. An interconnect layer for a device include a plurality of solder bumps arranged within the interconnect layer. A first subset of the plurality of solder bumps has a first cross-sectional area, where the first subset is arranged along a first position at a first edge of the interconnect layer. A second subset of the plurality of solder bumps has a second cross-sectional area, where the second subset is arranged at a second position of the interconnect layer. A third subset of the plurality of solder bumps is arranged between the first position and the second position, where the third subset has a plurality of cross-sectional areas.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Kamal K. SIKKA, Charles Leon ARVIN, Thomas Edward LOMBARDI, Piyas Bal CHOWDHURY, Alfred GRILL, Steven Lorenz WRIGHT
  • Publication number: 20220271005
    Abstract: An integrated circuit package structure is provided that includes a chip carrier substrate, at least one processor die provided on the chip carrier substrate, a plurality of lateral escape wiring lines connected to and extending away from the at least one processor die, and a plurality of chips at least partially surrounding the processor die, at least one of the chips overlapping with at least one of the lateral escape wiring lines in a plan view. An interconnect structure of the chips includes at least one vertical power feed structure that is configured and positioned not to intersect with the lateral escape wiring lines in the plan view.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventors: Charles Leon Arvin, Bhupender Singh, Joseph C. Sorbello, Joseph Jacobi, Thomas Edward Lombardi, SHIDONG LI, Mark William Kapfhammer
  • Publication number: 20220240767
    Abstract: A medical device inspection system includes a console and a flexible imaging scope. The console includes a housing, a video processor, a light source, a visual display on the housing, and an outlet with two ports. The flexible imaging scope is removably connected to the console via the outlet and includes a CMOS image sensor, an optical fiber bundle, and a connector assembly mounted to a proximal end of the imaging scope. The connector assembly includes an electrical image connector and a light source connector, which plug into the two ports of the outlet to connect the flexible imaging scope to the console.
    Type: Application
    Filed: February 3, 2022
    Publication date: August 4, 2022
    Inventors: Thomas Donald Chandler, Steven Edward Lombardi, Mark Francis Brown, Justin Andrew Hawley, Jerome Steven Stepanek
  • Patent number: 9433105
    Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
  • Patent number: 9293439
    Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: March 22, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
  • Patent number: 9093563
    Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: July 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
  • Publication number: 20150093859
    Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Applicant: International Business Machines Corporation
    Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
  • Publication number: 20150014836
    Abstract: An improved electronic module assembly and method of fabrication is disclosed. A patterned array of adhesive is deposited on a laminate, to which a chip is attached. Each region of adhesive is referred to as a lid tie. A lid is placed on the laminate, and is in contact with the lid ties. The lid ties serve to add stability to the laminate and reduce flexing during thermal processing and mechanical stress.
    Type: Application
    Filed: July 11, 2013
    Publication date: January 15, 2015
    Inventors: Edmund Blackshear, Elaine Cyr, Benjamin Vito Fasano, Paul Francis Fortier, Marcus E. Interrante, Roger Lam, Shidong Li, Thomas Edward Lombardi, Hilton T. Toy, Thomas Weiss
  • Publication number: 20110048790
    Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
  • Patent number: 5795217
    Abstract: A burnisher for disassociating undesirable material from a work piece includes a wire and a burnishing medium operably associated with the wire. The flexibility of the burnisher permits forces to be generated to disassociate the burnishing medium.
    Type: Grant
    Filed: November 22, 1995
    Date of Patent: August 18, 1998
    Assignee: International Business Machines Corporation
    Inventors: Mark Joseph LaPlante, Thomas Edward Lombardi, David Clifford Long, Anton Nenadic, Alan Piciacchio
  • Patent number: 5495624
    Abstract: An apparatus and a method for conserving the volume of water consumed during the flushing of waste deposited in the bowl of a toilet. A secondary water reservoir is mounted externally on the primary water reservoir of a conventional toilet. The primary water reservoir holds a first body of water whose volume is greater than a second body of water held by the secondary water reservoir. The first body of water may be discharged from the primary water reservoir directly into the bowl. Alternatively, the second body of water may be discharged from said second water reservoir into a water feed member which is mounted externally on the rim of the bowl and which directs said second body of water into said bowl along its perimeter in a slight downwardly direction.
    Type: Grant
    Filed: August 5, 1994
    Date of Patent: March 5, 1996
    Inventors: Ira M. Lisook, Edward Lombardi