Abstract: Briefly, in accordance with one embodiment of the invention, a first integrated circuit having control circuitry is bonded to a second integrated circuit having a memory array. The control circuitry of the first integrated circuit being adapted to access, at least in part, data stored in the memory array of the second integrated circuit.

Abstract: Briefly, in accordance with one embodiment of the invention, a first integrated circuit having control circuitry is bonded to a second integrated circuit having a memory array. The control circuitry of the first integrated circuit being adapted to access, at least in part, data stored in the memory array of the second integrated circuit.

Abstract: A method and apparatus improves data retention in a nonvolatile writeable memory. A first group of memory cells is identified as having a stored charge over a first threshold. A subset of the first group of memory cells having a stored charge less than a second threshold is determined. The subset of the memory cells is programmed until each of the memory cells of the subset has a stored charge over the second threshold.

Abstract: A method for controlling the programming and erasure time of a nonvolatile memory array in a memory device. A first value is defined, the first value representing a predetermined number of times a program or erase operation is to be reinitiated on the memory array. A write state machine of the memory device then initiates a program or erase operation on the nonvolatile memory array. The nonvolatile memory array is subsequently verified to determine if the program or erase operation was successful. If unsuccessful, the program or erase operation is repeated either until successful, or until the operation is repeated the predetermined number of times.