Patents by Inventor Edward McGrath

Edward McGrath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949395
    Abstract: Embodiments herein describe a hardened fractional resampler that includes a fixed filter that supports simultaneous processing of N input samples with minimal additional combinational logic and no additional multipliers. In one embodiment, the fractional resampler is implemented in an integrated circuit using hardened circuit. The embodiments below exploit a pattern in the order filter phases in fractional resampling systems (such as a SSR resampling system) to use filter phases in a single fixed filter to process multiple input samples in parallel, where these filter phases would have been unused in previous resampling systems.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 2, 2024
    Assignee: XILINX, INC.
    Inventors: Rhona Wade, John Edward McGrath
  • Patent number: 11777503
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: October 3, 2023
    Assignee: XILINX, INC.
    Inventors: John Edward McGrath, Woon Wong, John O'Dwyer, Paul Newson, Brendan Farley
  • Patent number: 11721373
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: August 8, 2023
    Assignee: XILINX, INC.
    Inventors: Richard Lewis Walke, John Edward Mcgrath
  • Patent number: 11695535
    Abstract: Embodiments herein describe an integrated circuit with a digital front end (DFE) that includes multiple hardened mixers that can be configured to support multiple different radio paths. The DFE provides the ability to distribute the processing across the multiple mixers, which can be combined and synchronized to create a larger mixer or may be used in other combinations to create multiple discrete mixers.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: July 4, 2023
    Assignee: XILINX, INC.
    Inventors: John Edward McGrath, Gourav Modi, Rhona Wade
  • Patent number: 11569820
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: January 31, 2023
    Assignee: XILINX, INC.
    Inventors: John Edward McGrath, Woon Wong, John O'Dwyer, Paul Newson, Brendan Farley
  • Publication number: 20230023866
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Application
    Filed: May 20, 2022
    Publication date: January 26, 2023
    Inventors: Richard Lewis WALKE, John Edward MCGRATH
  • Patent number: 11563435
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: January 24, 2023
    Assignee: XILINX, INC.
    Inventors: John Edward McGrath, Woon Wong, John O'Dwyer, Paul Newson, Brendan Farley
  • Patent number: 11483018
    Abstract: Examples described herein provide a radio frequency circuit. The radio frequency circuit includes a controller; a parameter estimator circuit; a capture circuit; and a pre-distorter circuit. The pre-distorter generally includes one or more nonlinear filter circuits and configurable hardware circuitry. Each of the one or more the nonlinear filter circuits includes: adder(s); multiplier(s); and memories coupled to at least one of the adder(s) and the multiplier(s); where the configurable hardware circuitry is configured to distort one or more input signals by directing the one or more input signals along a path through the one or more adders, the one or more multipliers, and the one or more memories and by distorting the one or input signals using the nonlinear parameters stored in the one or more memories as the one or more input signals travels the path.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: October 25, 2022
    Assignee: XILINX, INC.
    Inventors: Xiaohan Chen, Hemang M. Parekh, John Edward McGrath, Hongzhi Zhao, David Eugene Melinn
  • Publication number: 20220294598
    Abstract: Embodiments herein describe an integrated circuit with a digital front end (DFE) that includes multiple hardened mixers that can be configured to support multiple different radio paths. The DFE provides the ability to distribute the processing across the multiple mixers, which can be combined and synchronized to create a larger mixer or may be used in other combinations to create multiple discrete mixers.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Inventors: John Edward MCGRATH, Gourav MODI, Rhona WADE
  • Publication number: 20220224338
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Inventors: John Edward MCGRATH, Woon WONG, John O'DWYER, Paul NEWSON, Brendan FARLEY
  • Publication number: 20220224337
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Application
    Filed: March 30, 2022
    Publication date: July 14, 2022
    Inventors: John Edward MCGRATH, Woon WONG, John O'DWYER, Paul NEWSON, Brendan FARLEY
  • Patent number: 11348624
    Abstract: Embodiments herein describe a multi-port memory system that includes one or more single port memories (e.g., a memory that can perform only one read or one write at any given time, referred to as a 1W or 1R memory). That is, the multi-port memory system can perform multiple read and writes in parallel (e.g., 1R/1W, 1R/3W, 2R/2W, 3R/1W, etc.) even though the memory in the system can only perform one read or one write at any given time. The advantage of doing so is a reduction in area and power.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: May 31, 2022
    Assignee: XILINX, INC.
    Inventors: Richard Lewis Walke, John Edward Mcgrath
  • Publication number: 20220060189
    Abstract: An example programmable device includes a configuration memory configured to store configuration data; a programmable logic having a configurable functionality based on the configuration data in the configuration memory; a signal conversion circuit; a digital processing circuit; an endpoint circuit coupled to the signal conversion circuit through the digital processing circuit; wherein the digital processing circuit includes a first one or more digital processing functions implemented as hardened circuits each having a predetermined functionality, and a second one or more processing functions implemented by the configurable functionality of the programmable logic.
    Type: Application
    Filed: November 2, 2021
    Publication date: February 24, 2022
    Inventors: John Edward MCGRATH, Woon WONG, John O'DWYER, Paul NEWSON, Brendan FARLEY
  • Publication number: 20170225809
    Abstract: An assembly for creating water balloons that directs water from a water source into a manifold. Filler straws extend from the manifold. Latex balloons are readied for filling by placing a neck plug into the necks of the balloons. Each neck plug has an elastomeric body that is sized to plug the neck of the balloon. A blind bore is formed into each of the neck plugs. The fill straws are advanced into the blind bores of the neck plugs. The filler straws are advanced deeper into the neck plugs, therein piercing the material of the neck plugs and eventually passing through the neck plugs. Due to the elastomeric material of the neck plugs, a watertight seal is formed around the filler straws. Water is advanced through the filler straws to fill the balloons.
    Type: Application
    Filed: February 9, 2017
    Publication date: August 10, 2017
    Inventors: Jay Kamhi, John Edward McGrath, Siavash Mojarrad
  • Patent number: 8122004
    Abstract: Generating and providing rich media presentations to a requesting device is described. Attributes of the requesting device are determined and used to create optimized code for the requesting device. The attributes may include information relating to the operating system of the requesting device; a media player; a bandwidth parameter; presence or absence of a firewall, permissions related to the requesting device, and the like. A virtual player is created that includes code to play media files. A presentation package is created that sets the presentation attributes for the multimedia experience. A media package is created that instructs the virtual player what multimedia content to play.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: February 21, 2012
    Assignee: Dandia Audio KG Limited Liability Company
    Inventors: Kiran Venkatesh Hedge, Raymond Edward McGrath, III, Jason Matthew Walter Kind, Eric Kane Krause, Josiah DeWitt
  • Patent number: 8046672
    Abstract: The present invention plays rich media presentations included in an email, banner ad, and web page. Rich media presentations may be automatically played within an email, banner ad, and web page. When a video banner (Vbanner), video email (Vmail), or video page (Vpage) is included in a requested page, the requesting device receives the necessary rich media presentations, including a virtual player, presentation packages, and media packages, necessary to play the presentation. When the banner ad is downloaded, the rich media presentation begins to automatically play within the page on supported devices. Many options may be set controlling the operation of the Vbanner, Vmail and Vpage. A virtual player is created that includes code to play media files. A presentation package is created that sets the presentation attributes for the multimedia experience. A media package is created that instructs the virtual player what multimedia content to play.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: October 25, 2011
    Assignee: Dandia Audio KG Limited Liability Company
    Inventors: Kiran Venkatesh Hegde, Raymond Edward McGrath, Jason Matthew Walter Kind, Eric Kane Krause, Josiah DeWitt, Stephen M. Wyand, Brian David Young
  • Patent number: 7818321
    Abstract: The present invention provides rich media presentations to a requesting device when required. Attributes of the requesting device are determined and used to create optimized code for the requesting device. The attributes may include information relating to the operating system of the requesting device; a media player; a bandwidth parameter; presence or absence of a firewall, permissions related to the requesting device, and the like. A virtual player is created that includes code to play media files. A presentation package is created that sets the presentation attributes for the multimedia experience. A media package is created that instructs the virtual player what multimedia content to play.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: October 19, 2010
    Inventors: Kiran Venkatesh Hegde, Raymond Edward McGrath, III, Jason Matthew Walter Kind, Eric Kane Krause, Josiah DeWitt
  • Publication number: 20100100636
    Abstract: Generating and providing rich media presentations to a requesting device is described. Attributes of the requesting device are determined and used to create optimized code for the requesting device. The attributes may include information relating to the operating system of the requesting device; a media player; a bandwidth parameter; presence or absence of a firewall, permissions related to the requesting device, and the like. A virtual player is created that includes code to play media files. A presentation package is created that sets the presentation attributes for the multimedia experience. A media package is created that instructs the virtual player what multimedia content to play.
    Type: Application
    Filed: October 26, 2009
    Publication date: April 22, 2010
    Inventors: Kiran Venkatesh Hegde, Raymond Edward McGrath, III, Jason Matthew Walter Kind, Eric Kane Krause, Josiah DeWitt
  • Patent number: 7155436
    Abstract: The present invention provides rich media presentations to a requesting device when required. Attributes of the requesting device are determined and used to create optimized code for the requesting device. The attributes may include information relating to the operating system of the requesting device; a media player; a bandwidth parameter; presence or absence of a firewall, permissions related to the requesting device, and the like. A virtual player is created that includes code to play media files. A presentation package is created that sets the presentation attributes for the multimedia experience. A media package is created that instructs the virtual player what multimedia content to play.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: December 26, 2006
    Assignee: Vendaria, Inc
    Inventors: Kiran Venkatesh Hegde, Raymond Edward McGrath, III, Jason Matthew Walter Kind, Eric Kane Krause, Josiah DeWitt
  • Publication number: 20050276697
    Abstract: An airfoil for a gas turbine includes a leading edge, a trailing edge a tip plate, a first sidewall extending in radial span between an airfoil root and the tip plate, and a second sidewall connected to the first sidewall at the leading edge and the trailing edge to define a cooling cavity therein. The sidewall extends in radial span between the airfoil root and the tip plate. The airfoil also includes a plurality of longitudinally spaced apart trailing edge cooling slots arranged in a column extending through the first sidewall. The slots are in flow communication with the cooling cavity and arranged in a non-uniform distribution along the trailing edge so that the number of slots in at least one portion of the trailing edge is greater than a different portion of the trailing edge.
    Type: Application
    Filed: June 10, 2004
    Publication date: December 15, 2005
    Inventors: Edward McGrath, Benjamin Lagrange