Patents by Inventor Edward Nicholas Comfoltey
Edward Nicholas Comfoltey has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11942929Abstract: Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.Type: GrantFiled: July 26, 2022Date of Patent: March 26, 2024Assignee: PSEMI CORPORATIONInventors: Jeffrey A. Dykstra, Jaroslaw Adamski, Edward Nicholas Comfoltey
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Patent number: 11923322Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: December 7, 2021Date of Patent: March 5, 2024Assignee: pSemi CorporationInventors: William R. Smith, Jr., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20240039527Abstract: Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.Type: ApplicationFiled: July 26, 2022Publication date: February 1, 2024Inventors: Jeffrey A. DYKSTRA, Jaroslaw ADAMSKI, Edward Nicholas COMFOLTEY
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Publication number: 20230288462Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: March 21, 2023Publication date: September 14, 2023Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Patent number: 11624762Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: GrantFiled: June 18, 2021Date of Patent: April 11, 2023Assignee: pSemi CorporationInventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20220404406Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20220406997Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: May 13, 2022Publication date: December 22, 2022Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20220173058Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: December 7, 2021Publication date: June 2, 2022Inventors: William R. Smith, JR., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 11211344Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: October 8, 2019Date of Patent: December 28, 2021Assignee: pSemi CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 10680590Abstract: A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.Type: GrantFiled: March 29, 2019Date of Patent: June 9, 2020Assignee: pSemi CorporationInventors: Jianhua Lu, Naveen Yanduru, Edward Nicholas Comfoltey, Michael Conry, Chieh-Kai Yang
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Patent number: 10622995Abstract: A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an “open” (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances.Type: GrantFiled: November 26, 2018Date of Patent: April 14, 2020Assignee: pSemi CorporationInventors: Michael Conry, Kevin Roberts, Edward Nicholas Comfoltey
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Publication number: 20200111756Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: October 8, 2019Publication date: April 9, 2020Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 10468360Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: May 23, 2017Date of Patent: November 5, 2019Assignee: pSemi CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20190296722Abstract: A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.Type: ApplicationFiled: March 29, 2019Publication date: September 26, 2019Inventors: Jianhua Lu, Naveen Yanduru, Edward Nicholas Comfoltey, Michael Conry, Chieh-Kai Yang
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Publication number: 20190173466Abstract: Methods and devices taught in the present disclosure address the need for reconfigurable multi-pole multi-throw switches for various RF applications having different design requirements. Such reconfigurable switches can be reused for different applications without having to go through long research, development and manufacturing cycles. Design of multi-pole multiple switches with improved performance metric such as insertion loss, parasitic capacitance and bandwidth is also made possible using the teachings of the disclosure.Type: ApplicationFiled: December 1, 2017Publication date: June 6, 2019Inventors: Ethan Prevost, Dylan J. Kelly, Kevin Roberts, Edward Nicholas Comfoltey
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Patent number: 10277211Abstract: A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.Type: GrantFiled: November 30, 2016Date of Patent: April 30, 2019Assignee: pSemi CorporationInventors: Jianhua Lu, Peter Bacon, Naveen Yanduru, Edward Nicholas Comfoltey, Michael Conry, Chieh-Kai Yang
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Publication number: 20190097627Abstract: A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an “open” (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances.Type: ApplicationFiled: November 26, 2018Publication date: March 28, 2019Inventors: Michael Conry, Kevin Roberts, Edward Nicholas Comfoltey
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Patent number: 10224913Abstract: A fast response time, self-activating, adjustable threshold limiter including a limiting element LE, a first coupling element CE1 electrically connected from a signal node of LE to a control input of LE, and a second coupling element CE2 electrically connected from the control input of LE to a nominal node of LE. An initial bias (control) voltage is also supplied to the control input of LE to dynamically control the limiting threshold for the limiter. Embodiments include usage of self-activating adjustable power limiters in combination with series switch components in a switch circuit in lieu of conventional shunt switches.Type: GrantFiled: November 30, 2016Date of Patent: March 5, 2019Assignee: pSemi CorporationInventors: Jianhua Lu, Peter Bacon, Naveen Yanduru, Edward Nicholas Comfoltey, Michael Conry, Chieh-Kai Yang
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Patent number: 10210118Abstract: Circuits and methods for efficient interconnect layout of multiple circuit elements, including integrated circuits (ICs), within a circuit module, while enabling only a single control/status (C/S) connection per module. In a first embodiment, the C/S interfaces of multiple ICs are configured in parallel within a multi-IC module, and coupled through a single module serial bus to a system C/S serial bus. In a second embodiment, the C/S interface of a primary IC is coupled through a single module serial bus to a system C/S serial bus, while a secondary IC is internally serially coupled to a “pass through” interface of the primary IC. In a third embodiment, a dynamic address translation circuit translates device and register address information provided by a master device into corresponding internal addresses, and re-directs command messages from a system C/S serial bus to internal slave devices.Type: GrantFiled: November 1, 2016Date of Patent: February 19, 2019Assignee: pSemi CorporationInventors: David Alan Podsiadlo, Edward Nicholas Comfoltey
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Patent number: 10199996Abstract: A high performance low noise amplifier integrated circuit having multiple low noise amplifiers enabling operation over a wide range for frequencies is disclosed. In particular, an auxiliary input is provided to the low noise amplifier integrated circuit that can be routed to one of several low noise amplifiers, each tuned to operate efficiently in different frequency ranges.Type: GrantFiled: June 2, 2017Date of Patent: February 5, 2019Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Edward Nicholas Comfoltey