Abstract: A system for accounting for postage expended by a postage meter. The system includes a keyboard and display for entry of commands and postal information, a printer, a memory for storing account records and program data, the memory further including a non-volatile memory for storing account records and other data, an interface to an electronic postage meter, and a processor including a CPU. The processor controls an electronic postage meter through the interface in accordance with the program data and entered postal information to set the meter and then responds to signals from the meter to update account records. The processor may also edit selected account records in accordance with entered information. In one disclosed embodiment the system responds to an operator request to print the account data base by repetitively scanning the account data base and sequentially printing accounts.

Abstract: A system for accounting for postage expended by a postage meter. The system includes a keyboard and display for entry of commands and postal information, a printer, a memory for storing account records and program data, the memory further including a non-volatile memory for storing account records and other data, an interface to an electronic postage meter, and a processor including a CPU. The processor controls an electronic postage meter through the interface in accordance with the program data and entered postal information to set the meter and then responds to signals from the meter to update account records. The processor may also edit selected account records in accordance with entered information. In one disclosed embodiment the system responds to an operator request to print the account data base by repetitively scanning the account data base and sequentially printing accounts.

Abstract: A postage value determining scale includes a system processor, a weighing device which generates weight indicative signals, a display and a keyboard for operator entry of information relating to the determination of postage and one or more memories which store postage data. The keyboard includes a plurality of nonilluminated multifunction keys with specific keys being assigned for the entry of special services such as certified mail, c.o.d., special delivery and the like. Upon detecting a keyboard entry assigned for such purpose, the processor recalls and sequentially displays indicia of special services previously selected by the operator and optionally the fee amount of each selected service. After displaying indicia of all the special services selected, the processor thereafter re-enters the previously displayed indicia in the display.

Abstract: An interface is connected between an OCIA type port and a mailing system peripheral, such as a weighing cell. The interface comprises an input data circuit, operatively connected to a serial data input line and to an associated input clock line, for receiving serial data input words comprising 8 serial data bits and an end-of-message (EOM) bit. The input circuit converts the serial input words into parallel form and transfers them to a programmable interface controller. The interface also includes an output circuit for transforming parallel output words from the interface controller into serial format. The output circuit is operatively connected to a serial data output line and an output data clock line from the OCIA type port. When an output data word is loaded into the output circuit the output line is forced to a predetermined logical level signalling the port the data is available. The port then provides a series of clock pulses to shift the data word out from the output circuit.

Abstract: A postage value determining scale includes a scale for determining the weight of an item to be mailed, a system processor for determining the applicable postage value and a display for displaying a breakdown of such postage value, all inter-connected by a common data bus. Another embodiment of the disclosed invention further includes a keyboard having a keyset limited to numeric keys and function keys for entering additional information such as class of service, destination, etc. into the system processor to be used by the system processor in determining the applicable postage value; the system processor transmitting such information to the display. Preferably, the display includes a display processor, a display device operatively connected to the display processor for displaying alphanumeric information and a memory operatively connected to the display processor.

Abstract: A watchdog circuit for improving the possibility of recovery from failures, such as those caused by static discharge or RF interference, in a data processing system. A data processing system includes a main, multi-chip processor for handling the main computational burden and a single-chip processor for handling I/O functions. Additionally, the main processor periodically sends status to the single-chip processor. If the single-chip processor does not receive status within a predetermined period it generates a reset signal to the main processor. In response to the reset signal the main processor interrogates the single-chip processor to determine if the reset was caused by a failure or a power-on condition. Because of its self contained construction the single-chip processor is less susceptible to static induced failures and will improve the recovery capabilities of the system when used to monitor the main processor.

Abstract: An interface between a system processor of an automated mailing system and selected peripheral devices carries peripheral support hardware and software for communication with the peripherals. The interface includes a board having a memory wherein programs for formatting communications with the peripherals are stored. A working memory for the temporary storage of commands and data for communication to the peripherals and a peripheral controller for establishing a communications link with a selected peripheral are also carried on the interface board. A replaceable PROM is carried on the interface for accessing the output enable pins of the program and working memories. The PROM is replaced in the field when a different program or working memory is to be substituted.

Abstract: In a mailing system including a postage value determining system processor which communicates along parallel channels and peripheral subsystem processors adapted to communicate with a system processor along a serial data bus, an interface is provided between the system processor and the serial bus. The interface includes a first and a second communications processor. The first processor is programmed to communicate with the system processor and with the second communications processor. The second communications processor is programmed to communicate with the first processor and with peripheral subsystem processors through the serial bus. Data and control signals are transmitted between the communications processors through an interprocessor channel. The interprocessor channel includes lines connected to reference voltage levels for providing appropriate signal levels for recognition by the communications processors which operate on different voltage signal levels.

Abstract: A postage calculator system and method comprising means for introducing postal information to the system; a means for obtaining weight information of the article to be mailed; a memory means for storing information indicative of special feed categories; and means for generating a postage value for the article from the postal information, the weight information and the special fee information. The system selects postal information indicative of the carrier type, class and destination of an article to be mailed, obtains weight information for the article, selects special fee information indicative of at least one of the following special fee categories for use with the article: registered mail, special delivery, return receipt, certified mail, insurance and C.O.D. The system then generates a postage value, adjusted in accordance with the special fees, if any, determined, for the article.

Abstract: In a mailing system including a postage value determining system processor which communicates along parallel channels and peripheral subsystem processors adapted to communicate with a system processor along a serial data bus, an interface is provided between the system processor and the serial bus. The interface includes a first and a second communications processor. The first processor is programmed to communicate with the system processor and with the second communications processor. The second communications processor is programmed to communicate with the first processor and with peripheral subsystem processors through the serial bus. Data and control signals are transmitted between the communications processors through an interprocessor channel. The interprocessor channel includes lines connected to reference voltage levels for providing appropriate signal levels for recognition by the communications processors which operate on different voltage signal levels.

Abstract: An automated mailing system includes a scale having a weighing device, a keyboard for entering postage value determining data and an electronic postage meter selection code, a postage value determining processor and a programmable read only memory containing postal rate and zip to zone conversion data. A peripheral controller interface provides communication capability between the scale processor and a plurality of peripheral mailing devices including a series of electronic postage meters each of which is adapted to provide postage value denominations for mail originating from different postal zone distribution points. A data steering interface, which may be included within the peripheral controller interface, provides interconnection between the communications lines received from the scale system processor and the communication lines of the respective electronic postage meters.

Abstract: A parcel mailing system includes a postage value determining scale and peripheral mailing system devices such as a postage meter/mailing machine. The scale includes a main processor, a memory which stores postage rate data, a weighing device which generates weight indicative signals, a display, and a keyboard. A voice recognition subsystem is coupled to the system processor for hands free operator entry of information relating to postage value determinations. The voice recognition subsystem is trained to recognize various operator words and generate appropriate signals for postage value determination, e.g. zone information, zip code information, and rate classifications, as well as command signals. The system processor receives such signals from either the voice recognition subsystem or the keyboard.

Abstract: A postage value computing system includes both apparatus and a method for determining the postage of an article to be mailed for various domestic and international classes of postal service. Postal information such as carrier type, class and destination data are introduced into the system and used to access a memory which stores common structured rate data. Major rate structures are defined by weight headers which specify the upper and lower limits of weight ranges and the weight increments within those ranges. To minimize memory requirements, foreign countries are grouped as a function of such common structured rate data including permissible weight limits. Memory space is conserved through the utilization of a common postage computation routine including various equation subroutines for generating requisite postage values in accordance with the retrieved postage rate data.

Abstract: Automatic postage value computing for individually selected services is described using a replaceable individualized directory memory and a replaceable rate chart memory suitable with all directory memories. Memories are provided with pseudo rate charts that resemble conventional rate charts but serve to either grant or deny access to a rate chart depending upon the user's selection. The use of pseudo rate charts permits an unbundling of the postage value computation services to serve the user's needs, without requiring program changes. With individualized directory memory rate selection the updating of user rate chart memories is limited to those rates he has selected. Several embodiments are described.

Abstract: A method and apparatus are described for controlling access of a user of a postal value computing system to the computation of special fees. A directory memory stores a special fee control byte which is combined with a rate fee screen byte that is generated by the system to represent the special fee computations requested in response to actuation of the keyboard. The combining of the bytes employs a bit for bit AND operation with the result stored as a modified rate screen byte for use in the subsequent special fee computations. Access may then be granted or denied, depending upon the special fee control byte.

Abstract: An electronic weighing scale system capable of performing a plurality of functions. Predetermined subsets of the functions can be accessed from the system keyboard. The subset of functions which a particular keyboard can access is easily changed by replacing a non-volatile memory integrated circuit chip which may be the same one that contains postal rate information. Memory locations within the chip are segregated into two complementary arrays, one containing each possible combination of strobe and return signals, and the other containing a different word which defines one of the functions that the system can perform. When a particular key is actuated, the strobe/return signal output from the keyboard is compared with each of the strobe/return combinations stored in the first array. When a match is found, a function identification word is retrieved from the corresponding memory location in the second array to designate the specific function that the actuated key is intended to produce.

Abstract: An interface between a system processor of an automated mailing system and selected peripheral devices carries peripheral support hardware and software for communication with the peripherals. The interface includes a board having a memory wherein programs for formatting communications with the peripherals are stored. A working memory for the temporary storage of commands and data for communication to the peripherals and a peripheral controller for establishing a communications link with a selected peripheral are also carried on the interface board. The inclusion of additional peripheral devices or the substitution of alternate peripheral devices which would require revision of communications formatting programs does not require reprogramming of the system processor and is accommodated by revising the program stored in the interface program memory.

Abstract: An automated mailing system includes a postage value determining system processor, a scale for providing weight indicative signals, a keyboard for operator entry of information relating to a determination of postage, and a plurality of peripheral devices. A peripheral controller interface establishes communications links with the peripheral devices. An incompatible systems interface interconnects a serial communications bus of the system processor and the peripheral controller interface. The incompatible systems interface includes a processor programmed to receive, decode and transmit information from or to the system processor along the serial bus and load or receive information from or to the peripheral controller interface along parallel lines. The communication timing constraints of the serial communications bus for receipt of data signals by the system processor do not permit monitoring of the data transmission by the incompatible systems processor.

Abstract: An automated mailing system includes a postage value determining system processor, a scale for providing weight indicative signals, a keyboard for operator entry of information relating to a determination of postage, and a plurality of peripheral devices. A peripheral controller interface establishes communications links with the peripheral devices. An incompatible systems interface interconnects a serial communications bus of the system processor and the peripheral controller interface. The incompatible systems interface includes a processor programmed to receive, decode and transmit information from or to the system processor along the serial bus and load or receive information from or to the peripheral controller interface along parallel lines. The communication timing constraints of the serial communications bus for receipt of data signals by the system processor do not permit monitoring of the data transmission by the incompatible systems processor.

Abstract: A postage calculator system and method comprising means for introducing postal information to the system; a memory means for obtaining weight information of the article to be mailed; a memory means for storing information indicative of special fee categories; and means for generating a postage value for the article from the postal information, the weight information and the special fee information. The system selects postal information indicative of the carrier type, class and destination of an article to be mailed, obtains weight information for the article, selects special fee information indicative of at least one of the following special fee categories for use with the article: registered mail, special delivery, return receipt, certified mail, insurance and C.O.D. The system then generates a postage value for the article.