Patents by Inventor Edward P. Jordan
Edward P. Jordan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9685932Abstract: Provided herein are apparatus and methods for enhancing bandwidth in trench isolated integrated circuits. In certain configurations, an auxiliary trench forming floating regions between moat isolation regions can isolate parasitic sidewall capacitances of active device regions from ground or AC ground. In this manner the active device regions are merged by the auxiliary trench so as to improve circuit bandwidth and enhance circuit performance. When arranged or combined within a circuit branch, transistors within each floating moat can operate with relatively small parasitic displacement current and can have improved performance.Type: GrantFiled: May 15, 2015Date of Patent: June 20, 2017Assignee: Analog Devices, Inc.Inventors: Edward P. Jordan, Jonathan Glen Pfeifer
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APPARATUS AND METHODS FOR A VARIABLE GAIN PASSIVE ATTENUATOR WITH MULTIPLE LAYER ATTENUATION DEVICES
Publication number: 20170033770Abstract: Provided herein are apparatus and methods for a variable gain passive attenuator with multiple layer attenuation devices. In certain configurations, at least two rows of stacked FETs are layered in blocks, namely H (horizontal) blocks in a hierarchical schematic representation of the variable gain passive attenuator. Each stack of FETs receives a control signal, and by delaying a second control signal with respect to a first control signal, performance and linearity can be enhanced while insertion loss is reduced.Type: ApplicationFiled: July 28, 2015Publication date: February 2, 2017Inventor: Edward P. Jordan -
Apparatus and methods for a variable gain passive attenuator with multiple layer attenuation devices
Patent number: 9553563Abstract: Provided herein are apparatus and methods for a variable gain passive attenuator with multiple layer attenuation devices. In certain configurations, at least two rows of stacked FETs are layered in blocks, namely H (horizontal) blocks in a hierarchical schematic representation of the variable gain passive attenuator. Each stack of FETs receives a control signal, and by delaying a second control signal with respect to a first control signal, performance and linearity can be enhanced while insertion loss is reduced.Type: GrantFiled: July 28, 2015Date of Patent: January 24, 2017Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan -
Publication number: 20160336920Abstract: Provided herein are apparatus and methods for enhancing bandwidth in trench isolated integrated circuits. In certain configurations, an auxiliary trench forming floating regions between moat isolation regions can isolate parasitic sidewall capacitances of active device regions from ground or AC ground. In this manner the active device regions are merged by the auxiliary trench so as to improve circuit bandwidth and enhance circuit performance. When arranged or combined within a circuit branch, transistors within each floating moat can operate with relatively small parasitic displacement current and can have improved performance.Type: ApplicationFiled: May 15, 2015Publication date: November 17, 2016Inventors: Edward P. Jordan, Jonathan Glen Pfeifer
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Patent number: 6060933Abstract: An electronic vernier realizes programmable gain steps with first and second impedance ladders, a plurality of activatable coupling networks and a switch network. The ladders receive and progressively process the differential input signal into a plurality of progressive differential signals. In an embodiment, the coupling networks each generate a respective one of a plurality of progressive differential output signals in response to a respective one of the progressive differential signals and the switch network activates any selected one of the coupling networks. Thus, any selected vernier step is obtained by activating the respective coupling network. The verniers can be integrated into various systems, e.g., programmable amplifiers.Type: GrantFiled: July 8, 1998Date of Patent: May 9, 2000Assignee: Analog Devices, Inc.Inventors: Edward P. Jordan, Royal A. Gosser
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Patent number: 5574392Abstract: An asymmetrical ramp generator system for a pulse width modulator includes a complementary clock circuit; a first symmetrical dual ramp generator, responsive to the clock circuit, for generating first and second ramps having a predetermined voltage range and extending for a period equal to or greater than one half the clock cycle; a comparator device, responsive to the first and second symmetrical ramps and to a reference level within the predetermined voltage range of the first and second ramps, for generating corresponding dual first and second asymmetrical drive signals; and a second asymmetrical dual ramp generator, responsive to the first and second asymmetrical drive signals, for generating third and fourth asymmetrical overlapping ramps which extend beyond the predetermined voltage range.Type: GrantFiled: April 25, 1995Date of Patent: November 12, 1996Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5537027Abstract: A calibration system for an asymmetrical ramp generator system for a pulse width modulator wherein a current splitting circuit establishes a slew rate and a calibration level for the first ramp that is the same as the slew rate and the usable voltage range of the second ramp and wherein the first and second sets of ramps are matched so that calibration of the first set results in simultaneous calibration of the second set.Type: GrantFiled: April 25, 1995Date of Patent: July 16, 1996Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5317199Abstract: An improved ramp generator system includes a plurality of ramp generator circuits; a ramp rate signal source for controlling the ramp slope; a ramp voltage signal source for establishing the starting voltage of the ramp; a ramp starting signal source for starting the ramp; a device for defining a plurality of ramp periods; and a switching device, responsive to the device for defining the ramp periods, for alternately, sequentially connecting the ramp rate signal source, ramp voltage signal source, and ramp starting signal source, to each of the ramp generator circuits for producing a series of identical ramps.Type: GrantFiled: March 25, 1993Date of Patent: May 31, 1994Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5295158Abstract: A dynamically selectable multimode pulse width modulation system includes ramp generator means for generating a ramp; pulse edge modulation means responsive to the ramp generator means for defining a leading edge modulated pulse, a trailing edge modulated pulse and a dual edge modulated pulse; and mode selection means responsive to the pulse edge modulation means for selecting one of the leading edge modulation, trailing edge modulation, and dual edge modulation modes of pulse width modulation.Type: GrantFiled: May 29, 1992Date of Patent: March 15, 1994Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5283515Abstract: An automatic calibration for a ramp voltage generator includes a ramp voltage generator circuit responsive to a clock signal for providing a ramp voltage during a ramp voltage period; a comparator responsive to the ramp voltage for indicating whether the ramp voltage has reached a predetermined reference voltage level in the ramp voltage period; and a ramp rate control circuit responsive to the comparator for adjusting the ramp voltage generator circuit to drive the ramp voltage to obtain the predetermined reference voltage level in the ramp voltage period.Type: GrantFiled: May 29, 1992Date of Patent: February 1, 1994Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5208559Abstract: A pulse shaping system for a pulse width modulation system includes: a ramp generator for generating a ramp signal having a ramp portion and a rest portion; a latch signal generator providing a latch signal coincident with the ramp portion; an indicator circuit for indicating desired pulse width; a pulse edge modulator responsive to the ramp portion and to the indicator circuit for providing a pulse width modulated pulse having at least one of its edges modulated; and including one or both of a fill circuit and a blanking circuit. In response to an indication from the indicator circuit of a desired maximum pulse width, the fill circuit causes the latch signal and the pulse generated by the pulse edge modulator to be combined for producing a maximum width pulse at the full width of the latch signal and the ramp portion.Type: GrantFiled: May 29, 1992Date of Patent: May 4, 1993Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5198785Abstract: A dual edge pulse width modulation system includes a ramp generator for generating a voltage ramp; an n bit digital to analog converter having a normal and an inverted output for establishing a leading edge and a trailing edge reference; a comparator responsive to the ramp and the leading edge and trailing edge references, respectively, for defining the leading edge and the trailing edge of a pulse; and a pulse generator for producing a pulse having the width determined by the defined leading and trailing edges.Type: GrantFiled: May 29, 1992Date of Patent: March 30, 1993Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 5192922Abstract: An anti-false triggering system for a pulse width modulation system includes a ramp generator for generating a ramp signal having a ramp portion and a rest portion; a latch enable signal generator for providing a latch enable signal only during the ramp portion of the ramp signal; and a pulse edge modulator responsive to the ramp portion of the ramp signal for providing a pulse with at least one of its edges modulated, the pulse edge modulator being enabled by the latch enable signal only during the ramp portion of the ramp signal for suppressing false triggering of the pulse edge modulator during the rest portion of the ramp signal.Type: GrantFiled: May 29, 1992Date of Patent: March 9, 1993Assignee: Analog Devices, Inc.Inventor: Edward P. Jordan
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Patent number: 4018673Abstract: Method of removing coarse materials and chemical and mineral impurities from clay in order to produce a purified high solids suspension of said clay which method involves mixing a crude clay with water and a dispersing agent to form a high solids slurry; subjecting said slurry to intense centrifugal forces for a short period of time; separating said coarse material and said chemical and mineral impurities; and recovering the suspended clay as a fine fraction having a reduced content of coarse material and impurities.Type: GrantFiled: February 27, 1976Date of Patent: April 19, 1977Assignee: Thiele Kaolin CompanyInventors: Randall E. Hughes, Edward P. Jordan