Patents by Inventor Edward Pak
Edward Pak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10860503Abstract: A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.Type: GrantFiled: May 2, 2019Date of Patent: December 8, 2020Assignee: Keyssa Systems, Inc.Inventors: Roger Dwain Isaac, Alan T. Ruberg, Jeff Cuppett, Edward Pak
-
Publication number: 20200349096Abstract: A universal protocol engine circuit aggregates data of multiple communication ports that may use different communication protocols according to a configurable communication protocol. In a transmitter mode, the universal protocol engine circuit references a slot table defining a sequence of the ports to generate output data from the input data received from the ports, and transmits the output data over a wired or wireless communication link. In a receiver mode, the universal protocol engine circuit references the slot table to parse input data from the communication link into output data for each of the ports. The sequence of ports of the slot table may be configurable according to the speed or other properties of the communication ports.Type: ApplicationFiled: May 2, 2019Publication date: November 5, 2020Inventors: Roger Dwain Isaac, Alan T. Ruberg, Jeff Cuppett, Edward Pak
-
Patent number: 9685785Abstract: A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.Type: GrantFiled: February 14, 2014Date of Patent: June 20, 2017Assignee: Lattice Semiconductor CorporationInventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta
-
Patent number: 9398329Abstract: A system may include a video link and a hybrid link that connects a transmitting device to the receiving device, and at least one intermediate hop between the transmitting device and the receiving device. The intermediate hop may be configured to relay video content from the video source to the video sink through the hybrid link using one or more data relay modes. The hybrid link may be configured to perform hybrid link control signaling (HLCS) to manage a physical layer of the hybrid link. The video link between the video source and the video sink may be configured to transmit a video stream the from video source to the video sink over one or more video lanes. A video link training may be implemented for the video link and the hybrid link.Type: GrantFiled: January 12, 2011Date of Patent: July 19, 2016Assignee: Lattice Semiconductor CorporationInventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta, Byoung Woon Kim, Paul Daniel Heninwolf, Sangwan Kim, Sukjae Cho
-
Publication number: 20140159477Abstract: A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.Type: ApplicationFiled: February 14, 2014Publication date: June 12, 2014Applicant: Silicon Image, Inc.Inventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta
-
Patent number: 8680712Abstract: A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.Type: GrantFiled: December 11, 2009Date of Patent: March 25, 2014Assignee: Silicon Image, Inc.Inventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta
-
Publication number: 20130191570Abstract: A system for delivering USB data over a DiiVA network may include a USB host controller, at least one USB device, a first DiiVA device connected to the USB host controller through an upstream USB port, a second DiiVA device connected to the USB device through a downstream USB port; and a network configured to transfer data between the first DiiVA device and the second DiiVA device according to USB protocol through a DiiVA bi-directional hybrid link in the network. The network is responsive to the USB host controller to deliver contents for the USB protocol through at least one line state information packet and at least one USB data packet transmitted through the hybrid link between the upstream USB port and the downstream USB port.Type: ApplicationFiled: January 12, 2011Publication date: July 25, 2013Applicant: SYNERCHIP CO., LTD.Inventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta, Byoung Woon Kim, Paul Heninwolf, Sangwan Kim, Sukjae Cho
-
Publication number: 20130191872Abstract: A system may include a video link and a hybrid link that connects a transmitting device to the receiving device, and at least one intermediate hop between the transmitting device and the receiving device. The intermediate hop may be configured to relay video content from the video source to the video sink through the hybrid link using one or more data relay modes. The hybrid link may be configured to perform hybrid link control signaling (HLCS) to manage a physical layer of the hybrid link. The video link between the video source and the video sink may be configured to transmit a video stream the from video source to the video sink over one or more video lanes. A video link training may be implemented for the video link and the hybrid link.Type: ApplicationFiled: January 12, 2011Publication date: July 25, 2013Inventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta, Byoung Woon Kim, Paul Heninwolf, Sangwan Kim, Sukjae Cho
-
Publication number: 20100283324Abstract: A system for delivering power over a network of devices connected through a serial link includes a first and second differential pairs of wires. Each differential pair of wires is double AC coupled by a HPF on one side and by another HPF on an opposite side. An LPF connects a portion of each differential pair of wires between the HPFs to a voltage source, and another LPF connects that portion of each differential pair to a load. The system further includes a third and fourth differential pairs of wires. All four differential pairs of wires are located within a single cable, such as a CAT6 cable. The first, second and third differential pair of wires are used for video links, and the fourth differential pair of wires are used for the bi-directional hybrid link. A power delivery circuit in each device includes a voltage source, a power relay switch, a signature resistor for detection, and a load detector.Type: ApplicationFiled: December 11, 2009Publication date: November 11, 2010Applicant: SYNERCHIP CO., LTD.Inventors: Dongyun Lee, Edward Pak, John Hahn, Mayank Gupta
-
Patent number: 7274690Abstract: A content addressable merged queue (camQ) architecture for high-speed switch fabrics reduces the memory requirement for crossbar switch input and output queues using memory cells and age tag comparators. CamQ emulates VOQ FIFO for each supporting priority, eliminating HOL blocking. Multiple QoS levels are supported cost effectively at higher traffic bandwidth limits. Content addressable memory (CAM) cells store payload destinations, which can be addressed by cell priorities. Once a priority for QoS is decided, all the cells with the selected priority in the payload can make connection requests to destination ports directly through the CAM structure. An age tag is assigned to incoming cells and fast age tag comparators provide FCFS features by selecting the oldest cell. Small memory sizes prevent the bottlenecking in ingress and egress queues. A CIOQ crossbar has a fast switching speed, emulating a FIFO output queue switch. Age and priority are interleaved to schedule switching.Type: GrantFiled: November 22, 2002Date of Patent: September 25, 2007Assignee: Silicon Image, Inc.Inventors: Sung Soo Park, Sung Man Park, Jung Wook Cho, Edward Pak
-
Patent number: 6388471Abstract: A method and a device for maintaining logic state stored in a storage device are described. For one embodiment, the device precharges at least two complimentary nodes in a storage device during the precharge cycle. During the evaluation cycle, the device receives an input data. After receipt of the input data, device stores at least one logic state at a storage node according to the input data. The device includes at least one conducting path to limit one store per each evaluation stage.Type: GrantFiled: May 12, 2000Date of Patent: May 14, 2002Assignee: SandCraft, Inc.Inventors: Wei-ping Lu, Tejvansh S. Soni, Victor Shadan, Edward Pak, Yuan-ping Chen