Patents by Inventor Edward Provo Wallis Horne

Edward Provo Wallis Horne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230120079
    Abstract: an amplifier having an input terminal and an output terminal. The input terminal is configured to receive a radio frequency (RF) input signal. The device includes an output network coupled to the output terminal of the power amplifier and a first passively tunable integrated circuit (PTIC) coupled to the output network. The first PTIC includes a direct-current (DC) bias voltage input terminal configured to receive a fixed bias voltage, a control signal input terminal configured to receive a time-varying control signal, wherein the fixed bias voltage in combination with the time-varying control signal sets an operating reference point of the first PTIC, and an input terminal electrically connected to the output terminal of the amplifier, wherein a change in an output voltage signal generated by the power amplifier causes the first PTIC to modify a first effective impedance of a load presented to the power amplifier via the output network.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Joseph Staudinger, Edward Provo Wallis Horne, Matthew Russell Greene, Johannes Lambertus Holt
  • Patent number: 11522498
    Abstract: Aspects of the subject disclosure may include a Doherty amplifier that includes a carrier amplifier having an output terminal, an output network coupled to the output terminal, and a peaking amplifier, wherein the output network comprises a non-linear reactance component, and wherein the non-linear reactance component changes an effective impedance of a load presented to the carrier amplifier when the peaking amplifier is off. Other embodiments are disclosed.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: December 6, 2022
    Assignee: NXP USA, Inc.
    Inventors: Joseph Staudinger, Matthew Russell Greene, Edward Provo Wallis Horne, Johannes Lambertus Holt, Peter Zahariev Rashev
  • Patent number: 11444150
    Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a thin film capacitor a silicon substrate having a silicon dioxide layer; an adhesion layer on the silicon dioxide layer, wherein the adhesion layer is a polar dielectric; a first electrode layer on the adhesion layer; a dielectric layer on the first electrode layer; and a second electrode layer on the dielectric layer. Other embodiments are disclosed.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: September 13, 2022
    Assignee: NXP USA, Inc.
    Inventors: Marina Zelner, Andrew Vladimir Claude Cervin, Edward Provo Wallis Horne
  • Publication number: 20220158590
    Abstract: Aspects of the subject disclosure may include a Doherty amplifier that includes a carrier amplifier having an output terminal, an output network coupled to the output terminal, and a peaking amplifier, wherein the output network comprises a non-linear reactance component, and wherein the non-linear reactance component changes an effective impedance of a load presented to the carrier amplifier when the peaking amplifier is off. Other embodiments are disclosed.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 19, 2022
    Applicant: NXP USA, Inc.
    Inventors: Joseph Staudinger, Matthew Russell Greene, Edward Provo Wallis Horne, Johannes Lambertus Holt, Peter Zahariev Rashev
  • Publication number: 20210104596
    Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a thin film capacitor a silicon substrate having a silicon dioxide layer; an adhesion layer on the silicon dioxide layer, wherein the adhesion layer is a polar dielectric; a first electrode layer on the adhesion layer; a dielectric layer on the first electrode layer; and a second electrode layer on the dielectric layer. Other embodiments are disclosed.
    Type: Application
    Filed: December 11, 2020
    Publication date: April 8, 2021
    Inventors: Marina Zelner, Andrew Vladimir Claude Cervin, Edward Provo Wallis Horne
  • Patent number: 9406444
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a first solid electrode, a second electrode separated into subsections, and a dielectric medium separating the subsections from the first solid electrode, where the subsections of the second electrode include a first group of subsections and a second group of subsections, where the first group of subsections are connectable with a first terminal for receiving an input signal, and where the second group of subsections is connectable with a second terminal for providing an output signal. Other embodiments are disclosed.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: August 2, 2016
    Assignee: BLACKBERRY LIMITED
    Inventors: James Oakes, James Martin, Edward Provo Wallis Horne, William E. McKinzie
  • Publication number: 20120154975
    Abstract: A system that incorporates teachings of the present disclosure may include, for example, a first solid electrode, a second electrode separated into subsections, and a dielectric medium separating the subsections from the first solid electrode, where the subsections of the second electrode include a first group of subsections and a second group of subsections, where the first group of subsections are connectable with a first terminal for receiving an input signal, and where the second group of subsections is connectable with a second terminal for providing an output signal. Other embodiments are disclosed.
    Type: Application
    Filed: November 4, 2011
    Publication date: June 21, 2012
    Applicant: PARATEK MICROWAVE, INC.
    Inventors: James Oakes, James Martin, Edward Provo Wallis Horne, William E. McKinzie