Patents by Inventor Edward R. Fix

Edward R. Fix has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6817823
    Abstract: The invention relates to a wafer transfer system that achieves high efficiency, as measured by throughput rate. This is accomplished in one instance by the combination of reliable transfer of single wafers between ports while being simultaneously rotated to accomplish notch alignment. Another instance allows for simultaneous tilting of a multitude of wafers, such as changing the entire load of a transfer cassette between horizontal and vertical orientations, rather than operating on individual wafers serially. Furthermore, the design of this system renders it usable in both left-handed and right-handed workflow arrangements, not requiring construction of mirror-image systems and thereby achieving an economy of scale in production and inventory of the wafer transfer system itself.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: November 16, 2004
    Assignee: Marian Corporation
    Inventors: Edward R. Fix, William W. Becia, Douglas R. Farnlund, Sven Evers
  • Publication number: 20030057130
    Abstract: The invention relates to a wafer transfer system that achieves high efficiency, as measured by throughput rate. This is accomplished in one instance by the combination of reliable transfer of single wafers between ports while being simultaneously rotated to accomplish notch alignment. Another instance allows for simultaneous tilting of a multitude of wafers, such as changing the entire load of a transfer cassette between horizontal and vertical orientations, rather than operating on individual wafers serially. Furthermore, the design of this system renders it usable in both left-handed and right-handed workflow arrangements, not requiring construction of mirror-image systems and thereby achieving an economy of scale in production and inventory of the wafer transfer system itself.
    Type: Application
    Filed: September 10, 2002
    Publication date: March 27, 2003
    Inventors: Edward R. Fix, William W. Becia, Douglas R. Farnlund, Sven Evers
  • Patent number: 4206413
    Abstract: A circuit for indicating the approximate energy content of the most significant transient appearing on an electrical power line within a predetermined interval is disclosed. An input to a first threshold comparator (326) may be set by the user to mark the nominal minimum amplitude (V.sub.2 ) of voltage transient whose energy content (volt-second area) is to be recorded. The transient impulse voltage integrator (401) is turned on when the impulse amplitude exceeds a preliminary threshhold (V.sub.1) lower than the nominal amplitude (V.sub.2) under control of a second comparator (325) and flip-flop (423). When the transient impulse amplitude equals the nominal amplitude (V.sub.2), a latch (431) reading a digital converter (430) at the output of the integrator (401) is clocked to permit display of the accruing integrator. While the integration proceeds the threshold of the second comparator (325) is increased from V.sub.1 to V.sub.
    Type: Grant
    Filed: February 21, 1978
    Date of Patent: June 3, 1980
    Assignee: Dranetz Engineering Laboratories, Inc.
    Inventors: Philip P. Cox, Edward R. Fix