Abstract: A method of transmitting data packets in a heterogeneous network comprising first and second parts (10, 18) and an interface between the parts, comprises a device (16) in the first part (10) or interface determining the number of data packets being transmitted in a predetermined time and reserving sufficient information carrying capacity in the second part (18) corresponding to at least one data packet in excess of the number determined.

Abstract: The invention relates to a wireless network which includes a plurality of network nodes, each of which includes a radio device with a respective radio clock supply and is arranged to exchange data via a wireless medium, and also includes a user interface for the exchange of data between the associated radio device and at least one user. At least one user of a network node receives a user clock, being independent of the radio clock, from a user clock supply of the relevant network node. Each network node is arranged to determine, in response to events specified by a central network node, a time value related to the relevant application clock. The central network node transmits at least the last time value formed by a selected network node.

Abstract: A method of communicating data from a data source (10) on one bus system (1) to a data sink (30) on another bus system (3) whose cycle rate is similar to but not synchronised with that of the first bus system comprises the steps of determining the tolerances with respect to frequency between the first and second bus cycle periods, assembling the data for transmission into packets, allocating a variable size, dependent on the tolerances, data payload to the packets, and including within the packets a header indicating the size of the payload. The receiving bus (3) receives these packets and extracts the data payload from the packets using the packet header indication of the size of the data payload.

Abstract: In an image source for multimedia applications such as networked computer games, a graphics engine (16) generates pixel images one line at a time using a scan-line algorithm and supplies the generated scan lines to an encoder (18) where they are buffered. The encoder codes the buffered pixel data as macroblocks of, for example 16.times.16 pixels according to MPEG or similar standards. When the graphics engine has sent sufficient scan lines for a first macroblock to the encoder, it sends a signal (FLAG) on receipt of which the encoder begins coding the pixel data as a macroblock in a line of macroblocks whilst continuing to receive scan lines from the graphics engine (16). To increase encoder efficiency, the graphics engine specifies to the encoder global (GMV) and macroblock (BMV) motion vectors for substantially all or selected ones of the macroblocks of an image respectively.

Abstract: A power semiconductor device (P) has first and second main electrodes (D) and (S) for coupling a load (L) between first and second voltage supply lines (2 and 3), a control electrode (G) coupled to a control voltage supply line (4) and a sense electrode (S1) for providing in operation of the power semiconductor device (P) a current that flows between the first and sense electrodes (D and S1) and is indicative of the current that flows between the first and second main electrodes (D and S). A current mirror arrangement (5) is provided having a first current path (5a) for passing a given current (I.sub.1) and a second current path (5b) for mirroring the given current. A control semiconductor device (M3) has first and second main electrodes (d and s) coupled between the control electrode (G) and the second main electrode (S) of the power semiconductor device (P) and a control electrode (g) coupled to the second current path (5b).

Abstract: A temperature sensing circuit (100) for sensing the temperature of an active semiconductor device, for example, a power MOSFET (11) of a semiconductor body (10). The circuit has a first temperature sensing device (R1R2) provided on the semiconductor body at a first position (P.sub.1) adjacent a periphery (12) of the active semiconductor device (11), a second temperature sensing device (R3,R4) provided on the semiconductor body at a second position (P.sub.2) further from the periphery of the active semiconductor device than the first position. An arrangement, for example, a comparator responsive to the first and second temperature sensing devices provides a control signal to switch off the active semiconductor device (11) when the difference in the temperature sensed by the first and second sensing devices reaches a predetermined value.

Abstract: A ring oscillator circuit comprises a plurality of inverter states (301, 302, 303) connected in a series loop. Each stage has a voltage input (315, 315', 315") with an associated input capacitance and input threshold voltage, and a current output (316, 316', 316"). An active output circuit regulates the output currents so as to regulate the frequency of oscillation. A single reference circuit (307) can be used by more than one stage. The output circuit can vary the output currents to compensate for variable supply voltages. The oscillator can be used as part of a bias generator in an integrated circuit.