Abstract: A method for distributing wire load among the layers of a multilayer interconnection package such that in each region of the package, the wire load is balanced among all layers and such that specified subsets of two-pin connections may be constrained to lie within the same layer.

Abstract: An improved testing and checking circuit for a Differential Cascode Voltage Switch which uses N-devices for both the invalid (0,0) and (1,1) state detection of Q and Q switch signals, and uses decoupling pass devices for sampling the data at the fall of the system C-clock, additionally allowing simultaneous pre-charging and error detection. The testing and checking circuit is incorporated in a hierarchical scheme, which uses the system C-clock for input to the latches, decoupling of the buffers, and pulling up and down the error lines. The error fault is held in a system latch. Also described is a circuit scheme which self tests a large macro using only the C-clock and latches the result in a single latch. More particularly, the described circuit employs the Q and Q signals in a NOR configuration, thus detecting if neither signal has sufficient voltage to pull down the load device which consists of a P-device whose gate is attached to the C-clock.

Abstract: The overall arrangement of a large number of discrete objects may be optimized with relation to the function of or the space occupied by the arrangement by establishing a suitability measure, or score, for each configuration of the arrangement, in relation to the function of or volume occupied, generating random local changes in the arrangement, scoring the effect of the individual changes and subjecting all objects in the arrangement to a random series of incremental changes whose outcome is on average predictable. The procedure lends itself to computer simulation. It may be applied to sequencing and scheduling problems, bin packing types of problems and in complex design problems such as semiconductor chip placement, wiring network routing and logic partitioning.