Abstract: A chip-scale package and method for making same. A pattern of conductive traces in the form of lead fingers is adhered to the active surface of a semiconductor die, preferably using a dielectric tape. The conductive traces are wire bonded to bond pads of the semiconductor die to establish electrical connections therebetween. Discrete conductive elements are then attached to the conductive traces in a pattern corresponding to a terminal pad pattern on a carrier substrate such as a printed circuit board. The semiconductor die, tape, conductive traces, wire bonds and interior portions of the discrete conductive elements are encapsulated to create a completed chip-scale package having an array of conductive connections protruding through the encapsulant.

Abstract: A method of forming a stencil for the manufacture of semiconductor devices includes defining a plurality of slightly spaced segmental annular openings in a stencil plate. The spacing between the segmental annular openings define spokes extending from a central portion of said stencil connected via those spokes to the rest of the stencil plate. The spokes extend past two adjacent annular segments.

Abstract: A method of adding a thermally conductive, electrically nonconductive filler to a flexible substrate such as a polyimide core. The substrate may be used, for example, as a part of a polyimide core for a tape or an interposer in a BGA or similar integrated circuit package. The resulting substrate has a higher thermal conductivity as compared to conventional substrates without fillers, thereby increasing the thermal dissipation through the substrate and enabling the device to cool more efficiently. The filler also reduces the coefficient of thermal expansion of the substrate to more closely match the die and reduce stresses. Furthermore, the filler increases the rigidity of the substrate, thereby enabling the device to be handled and carried more easily, for example, without a metal frame carrier.

Abstract: A BGA package and a method of fabricating the BGA package is provided. The package includes a substrate having a first surface with a pattern of conductors thereon, and an opposing second surface with a die attach area thereon. A first solder mask is formed on the first surface with via openings to ball bonding pads on the conductors. A second solder mask is formed on the second surface with an opening on the die attach area. The opening in the second solder mask permits a die to be placed through the opening and adhesively bonded directly to the substrate. The die can then be wire bonded to the conductors and encapsulated in an encapsulating resin. In addition solder balls can be placed in the via openings and bonded to the ball bonding pads.

Abstract: An improved method of attaching a semiconductor die to an organic substrate and an improved semiconductor package are herein disclosed. The die package comprises a die secured to a printed circuit board (PCB) with an adhesive tape. The adhesive tape may be of ingle or multi-layer construction. In one embodiment, a tri-layer tape is disclosed having a carrier layer sandwiched between two identical adhesive layers. In one embodiment, a method is disclosed utilizing a pressure sensitive, thermoset adhesive tape. In another embodiment, a method is disclosed utilizing a B-stageable thermoset adhesive. In yet another embodiment, a method using a pressure sensitive adhesive is disclosed. In still yet another embodiment, a method is disclosed wherein the adhesive is a hybrid material having both thermoset and thermoplastic components.

Abstract: An interposer in a BGA or similar package includes a polymide core and a filler of thermally conductive, electrically nonconductive filler. The interposer has a higher thermal conductivity as compared to conventional interposers, thereby increasing the thermal dissipation through the interposer and enabling the device to cool more efficiently. The filler also reduces the coefficient of thermal expansion of the interposer to more closely match the die and reduce stresses. Furthermore, the filler increases the rigidity of the interposer, thereby enabling the interposer to be handled and carried more easily, for example, without a metal frame carrier.

Abstract: A Z-axis electrical contact may be formed using a resinous deposit containing conductive particles which may align along surface regions to form an electrical conduction path over the resinous material. If the resinous material is thermoplastic, the material may be heated to mechanically bond to contact surfaces. Advantageously, the resinous material may be formed by forcing a resinous matrix containing conductive particles through an annular opening in a stencil. The resulting member allows surfaces to be contacted which may be irregular or may be covered by native oxide layers.

Abstract: An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C.

Abstract: An interposer in a BGA or similar package includes a polymide core and a filler of thermally conductive, electrically nonconductive filler. The interposer has a higher thermal conductivity as compared to conventional interposers, thereby increasing the thermal dissipation through the interposer and enabling the device to cool more efficiently. The filler also reduces the coefficient of thermal expansion of the interposer to more closely match the die and reduce stresses. Furthermore, the filler increases the rigidity of the interposer, thereby enabling the interposer to be handled and carried more easily, for example, without a metal frame carrier.

Abstract: A semiconductor device is provided with copper traces for connecting active elements to an external device, and insulating layers of black oxide (cupric oxide) are formed on the traces. The active elements may be, for example, conductors on the active surface of a semiconductor die. The external device may be, for example, a memory device or an input/output device. The invention eliminates the need for a resist solder mask. The black oxide prevents solder from adhering to the traces except where desired. The black oxide layers preferably do not cover the entire surfaces of the semiconductor device. The oxide layers grow only on the surfaces of the copper traces. Consequently, the dimensions of the finished device may be minimized. Black oxide may also be used to promote adhesion between the die and the substrate.

Abstract: An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C.

Abstract: A Z-axis electrical contact may be formed using a resinous deposit containing conductive particles which may align along surface regions to form an electrical conduction path over the resinous material. If the resinous material is thermoplastic, the material may be heated to mechanically bond to contact surfaces. Advantageously, the resinous material may be formed by forcing a resinous matrix containing conductive particles through an annular opening in a stencil. The resulting member allows surfaces to be contacted which may be irregular or may be covered by native oxide layers.

Abstract: An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C.

Abstract: A Z-axis electrical contact may be formed using a resinous deposit containing conductive particles which may align along surface regions to form an electrical conduction path over the resinous material. If the resinous material is thermoplastic, the material may be heated to mechanically bond to contact surfaces. Advantageously, the resinous material may be formed by forcing a resinous matrix containing conductive particles through an annular opening in a stencil. The resulting member allows surfaces to be contacted which may be irregular or may be covered by native oxide layers.

Abstract: An interposer in a BGA or similar package includes a polymide core and a filler of thermally conductive, electrically nonconductive filler. The interposer has a higher thermal conductivity as compared to conventional interposers, thereby increasing the thermal dissipation through the interposer and enabling the device to cool more efficiently. The filler also reduces the coefficient of thermal expansion of the interposer to more closely match the die and reduce stresses. Furthermore, the filler increases the rigidity of the interposer, thereby enabling the interposer to be handled and carried more easily, for example, without a metal frame carrier.

Abstract: A method of adding a thermally conductive, electrically nonconductive filler to a flexible substrate such as a polyimide core. The substrate may be used, for example, as a part of a polyimide core for a tape or an interposer in a BGA or similar integrated circuit package. The resulting substrate has a higher thermal conductivity as compared to conventional substrates without fillers, thereby increasing the thermal dissipation through the substrate and enabling the device to cool more efficiently. The filler also reduces the coefficient of thermal expansion of the substrate to more closely match the die and reduce stresses. Furthermore, the filler increases the rigidity of the substrate, thereby enabling the device to be handled and carried more easily, for example, without a metal frame carrier.

Abstract: An adhesive composition and methods incorporating the adhesive composition in semiconductor applications are provided. The adhesive composition is an instant setting adhesive composition that does not require external energy input such as heat or radiation such for application of the adhesive composition on a surface. The instant setting composition possesses sufficient thixotropic characteristics such that applying the instant setting adhesive composition to a surface can be accomplished by a variety of application techniques and in a variety of patterns. Once applied to the surface, the instant setting adhesive composition sets to retain the discrete pattern as applied, in a relatively short period of time, typically from about 0.10 to about 120 seconds at an ambient temperature, typically from 20° C. to 30° C.

Abstract: An improved method of attaching a semiconductor die to an organic substrate and an improved semiconductor package are herein disclosed. The die package comprises a die secured to a printed circuit board (PCB) with an adhesive tape. The adhesive tape may be of single or multi-layer construction. In one embodiment, a tri-layer tape is disclosed having a carrier layer sandwiched between two identical adhesive layers. In one embodiment, a method is disclosed utilizing a pressure sensitive, thermoset adhesive tape. In another embodiment, a method is disclosed utilizing a B-stageable thermoset adhesive. In yet another embodiment, a method using a pressure sensitive adhesive is disclosed. In still yet another embodiment, a method is disclosed wherein the adhesive is a hybrid material having both thermoset and thermoplastic components.

Abstract: An integrated circuit package may be formed in part with an encapsulated region. Outflow of the encapsulant across critical electrical elements can be prevented by providing a cavity which collects encapsulant outflow between the region of encapsulation and the region where the critical components are situated. In one embodiment of the present invention, a surface may include a first portion covered by solder resist, having an area populated by bond pads, and a second portion which is encapsulated. Encapsulant flow over the bond pads is prevented by forming an opening in the solder resist proximate to the second portion to collect the encapsulant before it reaches the bond pads.

Abstract: A chip-scale package and method for making same. A pattern of conductive traces in the form of lead fingers is adhered to the active surface of a semiconductor die, preferably using a dielectric tape. The conductive traces are wire bonded to bond pads of the semiconductor die to establish electrical connections therebetween. Discrete conductive elements are then attached to the conductive traces in a pattern corresponding to a terminal pad pattern on a carrier substrate such as a printed circuit board. The semiconductor die, tape, conductive traces, wire bonds and interior portions of the discrete conductive elements are encapsulated to create a completed chip-scale package having an array of conductive connections protruding through the encapsulant.