Patents by Inventor Edward Soltysiak

Edward Soltysiak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatus for burst tolerant excessive bit error rate alarm detection and clearing
    Patent number: 6775237
    Abstract: The excessive bit error rate detection algorithm operates in two modes: BURST mode and non-BURST mode. In non-BURST mode, an alarm state is entered if an error count exceeds a threshold within a set number of frames and exits the alarm state when the error count stays below a threshold for a set number of frames. In the BURST mode, the alarm state is not entered unless the error count exceeds the threshold two consecutive times and does not exit the alarm state unless the error rate remains below a threshold for two consecutive frame counts.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: August 10, 2004
    Assignee: Transwitch Corp.
    Inventors: Edward Soltysiak, Kumar Shakti Singh, Pawan Goyal
  • Methods and apparatus for burst tolerant excessive bit error rate alarm detection and clearing
    Publication number: 20030021234
    Abstract: The excessive bit error rate detection algorithm operates in two modes: BURST mode and non-BURST mode. In non-BURST mode, an alarm state is entered if an error count exceeds a threshold within a set number of frames and exits the alarm state when the error count stays below a threshold for a set number of frames. In the BURST mode, the alarm state is not entered unless the error count exceeds the threshold two consecutive times and does not exit the alarm state unless the error rate remains below a threshold for two consecutive frame counts.
    Type: Application
    Filed: March 29, 2001
    Publication date: January 30, 2003
    Inventors: Edward Soltysiak, Kumar Shakti Singh, Pawan Goyal