Patents by Inventor Edward Stokes Quicksall

Edward Stokes Quicksall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6044207
    Abstract: An enhanced performance dual port I/O bus bridge to connect a first I/O bus of bandwidth B and a second like-type I/O bus of bandwidth B with a simultaneously bi-directional data path operating at a bandwidth of at least B and typically at a bandwidth of from 2B to 4B. The enhanced dual port I/O bus bridge includes a first bridge interface and a second bridge interface to a first I/O bus and a second I/O bus respectively. The bridge also includes a first data access path buffering data and having a bandwidth of at least B between the first bridge interface and a data cache, and a second data access path buffering data and having a bandwidth of at least B between the second bridge interface and the same data cache. The data cache can be a RAID type cache. The enhanced I/O bus bridge is operated asynchronously by a means for controlling simultaneous bi-directional data flow between the first bridge interface and the second bridge interface by way of concurrent dual port access to the shared data cache.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: March 28, 2000
    Assignee: Adaptec, Inc.
    Inventors: Victor Key Pecone, Edward Stokes Quicksall