Patents by Inventor Edward Su

Edward Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chipset supporting a peripheral component interconnection express (PCI-E) architecture
    Patent number: 7594058
    Abstract: The present computing system using PCI-E architecture includes at least one first PCI-E port, a first port-arbiter, a first URD logic, a microprocessor, a DARD logic and a device arbiter. The first port-arbiter receives a data from the first PCI-E port. The first URD logic is coupled to said first port-arbiter. The first URD logic includes an onboard range table and a PCI-E device range table for detecting the data of onboard access or peer-to-peer access. The microprocessor receives and processes the data from the first URD logic for said onboard access. The DARD logic receives the data from the microprocessor. The DARD logic decodes a device range of a downstream request of the data. The device arbiter is coupled to the DARD logic and the first URD logic for dispatching the data to one of the first PCI-E port.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: September 22, 2009
    Assignee: Via Technologies, Inc.
    Inventors: Peter Chia, Chad Tsai, Jiin Lai, Edward Su, Chih-Kuo Kao
  • Method and computer system using PCI-Express
    Publication number: 20070106826
    Abstract: The present computing system using PCI-E architecture includes at least one first PCI-E port, a first port-arbiter, a first URD logic, a microprocessor, a DARD logic and a device arbiter. The first port-arbiter receives a data from the first PCI-E port. The first URD logic is coupled to said first port-arbiter. The first URD logic includes an onboard range table and a PCI-E device range table for detecting the data of onboard access or peer-to-peer access. The microprocessor receives and processes the data from the first URD logic for said onboard access. The DARD logic receives the data from the microprocessor. The DARD logic decodes a device range of a downstream request of the data. The device arbiter is coupled to the DARD logic and the first URD logic for dispatching the data to one of the first PCI-E port.
    Type: Application
    Filed: November 7, 2005
    Publication date: May 10, 2007
    Inventors: Peter Chia, Chad Tsai, Jiin Lai, Edward Su, Chih-Kuo Kao