Patents by Inventor Edward W. Kiewra

Edward W. Kiewra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111096
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to hybrid edge couplers with voids and methods of manufacture. The structure includes: a dielectric material; at least one waveguide structure embedded within the dielectric material; and at least one airgap within the dielectric material and extending along a length of the at least one waveguide structure.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 4, 2024
    Inventors: Yusheng BIAN, Sunoo KIM, Edward W. KIEWRA
  • Publication number: 20230101580
    Abstract: Disclosed are embodiments of a photonic integrated circuit (PIC) structure with a waveguide core having tapered sidewall liner(s) (e.g., symmetric tapered sidewall liners on opposing sides of a waveguide core, asymmetric tapered sidewall liners on opposing sides of a waveguide core, or a tapered sidewall liner on one side of a waveguide core). In some embodiments, the tapered sidewall liner(s) and waveguide core have different refractive indices. In an exemplary embodiment, the waveguide core is a first material (e.g., silicon) and the tapered sidewall liner(s) is/are a second material (e.g., silicon nitride) with a smaller refractive index than the first material. In another exemplary embodiment, the waveguide core is a first compound and the tapered sidewall liner(s) is/are a second compound with the same elements (e.g., silicon and nitrogen) as the first compound but with a smaller refractive index. Also disclosed are method embodiments for forming such a PIC structure.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Applicant: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Brett T. Cucci, Yusheng Bian, Abdelsalam Aboketaf, Edward W. Kiewra
  • Patent number: 11611002
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: a spiral fin structure comprising semiconductor substrate material and dielectric material; a photosensitive semiconductor material over sidewalls and a top surface of the spiral fin structure, the photosensitive semiconductor material positioned to capture laterally emitted incident light; a doped semiconductor material above the photosensitive semiconductor material; and contacts electrically contacting the semiconductor substrate material and the doped semiconductor material from a top surface thereof.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: March 21, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Mark D. Levy, Edward W. Kiewra, Siva P. Adusumilli, John J. Ellis-Monaghan
  • Publication number: 20220029032
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: a spiral fin structure comprising semiconductor substrate material and dielectric material; a photosensitive semiconductor material over sidewalls and a top surface of the spiral fin structure, the photosensitive semiconductor material positioned to capture laterally emitted incident light; a doped semiconductor material above the photosensitive semiconductor material; and contacts electrically contacting the semiconductor substrate material and the doped semiconductor material from a top surface thereof.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 27, 2022
    Inventors: Mark D. LEVY, Edward W. KIEWRA, Siva P. ADUSUMILLI, John J. ELLIS-MONAGHAN
  • Patent number: 11143953
    Abstract: The invention relates to a method used in a photolithographic process comprising depositing a film of Atomic Layered Deposition (ALD) Al2O3 on a photomask, subjecting said film of Al2O3 on the photomask to a plasma treatment and then irradiating the deposited film of ALD Al2O3 on the coated photomask at a wavelength of 193 nm.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: October 12, 2021
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Sandstrom, Peter H. Bartlau, Thomas B. Faure, Supratik Guha, Edward W. Kiewra, Louis M. Kindt, Alfred Wagner
  • Publication number: 20200301270
    Abstract: The invention relates to a method used in a photolithographic process comprising depositing a film of Atomic layered Deposition (ALD) Al2O3 on a photomask, subjecting said film of Al2O3 on the photomask to a plasma treatment and then irradiating the deposited film of ALD Al2O3 on the coated photomask at a wavelength of 193 nm.
    Type: Application
    Filed: March 21, 2019
    Publication date: September 24, 2020
    Inventors: Robert L. Sandstrom, Peter H. Bartlau, Thomas B. Faure, Supratik Guha, Edward W. Kiewra, Louis M. Kindt, Alfred Wagner
  • Publication number: 20180301568
    Abstract: Photodetector including: a waveguide of a waveguide material extending over a substrate; an insulating layer formed over the waveguide and having an opening exposing the waveguide; a photodetector layer formed over the insulating layer and into the opening so as to make contact with the waveguide, the photodetector layer having a first end at the opening and a second end distal from the opening, the photodetector layer being a gradient material of the waveguide material and germanium wherein a waveguide material portion of the gradient material varies from a maximum at the first end to a minimum at the second end and wherein a germanium portion of the gradient material varies from a minimum at the first end to a maximum at the second end; a photodetector region at the second end; and a photodetector layer extension extending at an angle from the photodetector layer at the second end.
    Type: Application
    Filed: April 13, 2017
    Publication date: October 18, 2018
    Inventors: John J. Ellis-Monaghan, Edward W. Kiewra, Jason S. Orcutt
  • Patent number: 10103280
    Abstract: Photodetector including: a waveguide of a waveguide material extending over a substrate; an insulating layer formed over the waveguide and having an opening exposing the waveguide; a photodetector layer formed over the insulating layer and into the opening so as to make contact with the waveguide, the photodetector layer having a first end at the opening and a second end distal from the opening, the photodetector layer being a gradient material of the waveguide material and germanium wherein a waveguide material portion of the gradient material varies from a maximum at the first end to a minimum at the second end and wherein a germanium portion of the gradient material varies from a minimum at the first end to a maximum at the second end; a photodetector region at the second end; and a photodetector layer extension extending at an angle from the photodetector layer at the second end.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John J. Ellis-Monaghan, Edward W. Kiewra, Jason S. Orcutt
  • Patent number: 9954137
    Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: April 24, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: John J. Ellis-Monaghan, John C. S. Hall, Marwan H. Khater, Edward W. Kiewra, Steven M. Shank
  • Patent number: 9882021
    Abstract: A method of forming a semiconductor substrate including a type III-V semiconductor material directly on a dielectric material that includes forming a trench in a dielectric layer, and forming a via within the trench extending from a base of the trench to an exposed upper surface of an underlying semiconductor including substrate. A III-V semiconductor material is formed extending from the exposed upper surface of the semiconductor substrate filling at least a portion of the trench.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: January 30, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cheng-Wei Cheng, Edward W. Kiewra, Amlan Majumdar, Uzma Rana, Devendra K. Sadana, Kuen-Ting Shiu, Yanning Sun
  • Patent number: 9882081
    Abstract: Disclosed are a method of forming a photodetector and a photodetector structure. In the method, a polycrystalline or amorphous light-absorbing layer is formed on a dielectric layer such that it is in contact with a monocrystalline semiconductor core of an optical waveguide. The light-absorbing layer is then encapsulated in one or more strain-relief layers and a rapid melting growth (RMG) process is performed to crystallize the light-absorbing layer. The strain-relief layer(s) are tuned for controlled strain relief so that, during the RMG process, the light-absorbing layer remains crack-free. The strain-relief layer(s) are then removed and an encapsulation layer is formed over the light-absorbing layer (e.g., filling in surface pits that developed during the RMG process). Subsequently, dopants are implanted through the encapsulation layer to form diffusion regions for PIN diode(s). Since the encapsulation layer is relatively thin, desired dopant profiles can be achieved within the diffusion regions.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: January 30, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: John J. Ellis-Monaghan, John C. S. Hall, Marwan H. Khater, Edward W. Kiewra, Steven M. Shank
  • Patent number: 9805949
    Abstract: A method of forming a high k gate stack on a surface of a III-V compound semiconductor, such GaAs, is provided. The method includes subjecting a III-V compound semiconductor material to a precleaning process which removes native oxides from a surface of the III-V compound semiconductor material; forming a semiconductor, e.g., amorphous Si, layer in-situ on the cleaned surface of the III-V compound semiconductor material; and forming a dielectric material having a dielectric constant that is greater than silicon dioxide on the semiconducting layer. In some embodiments, the semiconducting layer is partially or completely converted into a layer including at least a surface layer that is comprised of AOxNy prior to forming the dielectric material. In accordance with the present invention, A is a semiconducting material, preferably Si, x is 0 to 1, y is 0 to 1 and x and y are both not zero.
    Type: Grant
    Filed: September 9, 2012
    Date of Patent: October 31, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Jean Fompeyrine, Edward W. Kiewra, Steven J. Koester, Devendra K. Sadana, David J. Webb
  • Publication number: 20170250306
    Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Inventors: John J. ELLIS-MONAGHAN, John C.S. HALL, Marwan H. KHATER, Edward W. KIEWRA, Steven M. SHANK
  • Patent number: 9691812
    Abstract: Photodetector structures and methods of manufacture are provided. The method includes forming undercuts about detector material formed on a substrate. The method further includes encapsulating the detector to form airgaps from the undercuts. The method further includes annealing the detector material causing expansion of the detector material into the airgaps.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: June 27, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: John J. Ellis-Monaghan, John C. S. Hall, Marwan H. Khater, Edward W. Kiewra, Steven M. Shank
  • Patent number: 9678273
    Abstract: A device for propagating light is described, comprising: a substrate having a semiconductor material, an insulating layer, wherein the insulating layer is arranged on the substrate, a recess reaching through the insulating layer and into the substrate, wherein the recess is at least partially filled with a filler material, and a waveguide arranged in or on the filler material.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: June 13, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jens Hofrichter, Daniel S. Jubin, Edward W. Kiewra, Antonio La Porta
  • Patent number: 9658400
    Abstract: A method of forming a device for propagating light includes providing a substrate having a semiconductor material; placing an insulating layer on the substrate; providing a recess reaching through the insulating layer and into the substrate; filling the recess at least partially with a filler material; and arranging a waveguide in or on the filler material.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: May 23, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jens Hofrichter, Daniel S. Jubin, Edward W. Kiewra, Antonio La Porta
  • Patent number: 9590001
    Abstract: A method of protecting a CMOS device within an integrated photonic semiconductor structure is provided. The method may include depositing a conformal layer of germanium over the CMOS device and an adjacent area to the CMOS device, depositing a conformal layer of dielectric hardmask over the germanium, and forming, using a mask level, a patterned layer of photoresist for covering the CMOS device and a photonic device formation region within the adjacent area. Openings are etched into areas of the deposited layer of silicon nitride not covered by the patterned photoresist, such that the areas are adjacent to the photonic device formation region. The germanium material is then etched from the conformal layer of germanium at a location underlying the etched openings for forming the photonic device at the photonic device formation region. The conformal layer of germanium deposited over the CMOS device protects the CMOS device.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: March 7, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Solomon Assefa, Marwan H. Khater, Edward W. Kiewra, Carol Reinholm, Steven M. Shank
  • Publication number: 20170062647
    Abstract: Disclosed are a method of forming a photodetector and a photodetector structure. In the method, a polycrystalline or amorphous light-absorbing layer is formed on a dielectric layer such that it is in contact with a monocrystalline semiconductor core of an optical waveguide. The light-absorbing layer is then encapsulated in one or more strain-relief layers and a rapid melting growth (RMG) process is performed to crystallize the light-absorbing layer. The strain-relief layer(s) are tuned for controlled strain relief so that, during the RMG process, the light-absorbing layer remains crack-free. The strain-relief layer(s) are then removed and an encapsulation layer is formed over the light-absorbing layer (e.g., filling in surface pits that developed during the RMG process). Subsequently, dopants are implanted through the encapsulation layer to form diffusion regions for PIN diode(s). Since the encapsulation layer is relatively thin, desired dopant profiles can be achieved within the diffusion regions.
    Type: Application
    Filed: August 3, 2016
    Publication date: March 2, 2017
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: John J. Ellis-Monaghan, John C. S. Hall, Marwan H. Khater, Edward W. Kiewra, Steven M. Shank
  • Publication number: 20170052318
    Abstract: A method of forming a device for propagating light includes providing a substrate having a semiconductor material; placing an insulating layer on the substrate; providing a recess reaching through the insulating layer and into the substrate; filling the recess at least partially with a filler material; and arranging a waveguide in or on the filler material.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 23, 2017
    Inventors: Jens Hofrichter, Daniel S. Jubin, Edward W. Kiewra, Antonio La Porta
  • Publication number: 20160349452
    Abstract: A device for propagating light is described, comprising: a substrate having a semiconductor material, an insulating layer, wherein the insulating layer is arranged on the substrate, a recess reaching through the insulating layer and into the substrate, wherein the recess is at least partially filled with a filler material, and a waveguide arranged in or on the filler material.
    Type: Application
    Filed: June 1, 2015
    Publication date: December 1, 2016
    Inventors: Jens Hofrichter, Daniel S. Jubin, Edward W. Kiewra, Antonio La Porta