Abstract: A method utilizes a virtual flight recorder to harvest a subset of events being collected by an active system tracing facility during operation of a computer system. The virtual flight recorder is “virtual” from the sense that it is not specifically instrumented into a component with which the virtual flight recorder is associated, which eliminates the burden on developers to specifically instrument components of interest, and minimizes the impact on system performance as a result of performance metric collection.

Abstract: A method, apparatus, system, and signal-bearing medium that, in an embodiment, determine a first number of execution cycles used by a calibration program for an event group with a collector inactive, determine a second number of execution cycles used by the calibration program for the event group with the collector active, and calculate a compensation value for the event group based on the difference between the second number and the first number of execution cycles. These determinations and calculations may be repeated for any number of event groups. When performance data is subsequently collected by the collector, collected events that belong to the event groups have their collected execution cycles adjusted based on the calculated compensation values.

Abstract: Process and apparatus for testing a microprocessor and dynamic RAM by a single tester where the microprocessor and dynamic RAM may be on a single card. The process makes the RAM appear static to an external static tester by separate read/write and refresh logic for the RAM. Two different clock generators connect to logic where each clock is selectively connectable to an on-board oscillator or to an external input. Priority logic for gating the refresh logic within a predetermined interval and gating the read/write logic at other times. The process includes three steps of a static logic test, a memory interface test, and, a functional test of the logic and the dynamic RAM. The third step is accomplished by executing a program in the on-card microprocessor. The three steps of the test form a single set of test data.

Abstract: a read only memory on a semiconductor substrate having metal word lines and diffused bit lines with optimized dimensions for a selected performance and storage capacity with the metal lines being along an X dimension and the diffused lines being orthogonally related to the metal lines along a Y dimension. The X dimension for the substrate is given by the relation X = 2.sup.N .multidot. WL .multidot. K1 where 2.sup.N is an integer definitive of the number of words on a metal line where N is any integer power greater than zero; WL is word length which equals the number of storage devices per word selected for a word and K1 is a constant definitive of the average spacing in mils between the storage devices along the first length, and the Y dimension being given by a second relation Y = K2 .multidot. QN where K2 is a constant definitive of the spacing in mils between the adjacent rows of storage devices along the second length and Q is the number of said words.