Abstract: A laser-based mono-energetic gamma-ray source is used to provide non-destructive and non-intrusive, quantitative determination of the absolute amount of a specific isotope contained within pipe as part of a moving fluid or quasi-fluid material stream.

Abstract: A laser-based mono-energetic gamma-ray source is used to provide non-destructive and non-intrusive, quantitative determination of the absolute amount of a specific isotope contained within pipe as part of a moving fluid or quasi-fluid material stream.

Abstract: A method and system are disclosed for analyzing an event in a network. For example, the method for analyzing an event in a network includes identifying a network protocol error in the network, identifying a network hardware failure in the network, correlating the network protocol error and the network hardware failure to determine a correlation result, and outputting the correlation result to a user interface. The correlation output can provide an indication of a relationship between the network protocol error and the network hardware failure.

Abstract: A method for creating a user interface for a system may include dynamically assessing entitlement of a user to data elements and/or processes of the system based at least on a security setting of the user and a context of the transaction between the user and the system, authorizing the user to access portions of the system, and filtering a response message of the system based at least on the authorization of the user. The user interface may be rendered based at least on the filtered response message to allow the user to access some portions of the system and to inhibit the user from accessing other portions of the system. A system may include a CPU and a memory coupled to the CPU including program instructions executable to implement the method described above. A carrier medium may include program instructions executable to implement the method described above.

Abstract: The present invention is a method and apparatus for applying one-dimensional proximity correction to a piece of a mask pattern, by segmenting a first piece of a mask pattern with horizontal dividing lines into a plurality of segments, segmenting a second piece of said mask pattern with said horizontal dividing lines into a second plurality of segments, and applying proximity correction to a first segment from said first plurality of segments taking into consideration a second segment from said second plurality of segments.

Abstract: The present invention is a method and apparatus for applying proximity correction to a piece of a mask pattern, by segmenting the piece into a plurality of segments, and applying proximity correction to a first segment without taking into consideration the other segments of the piece.

Abstract: The present invention is a method and apparatus for applying proximity correction to a piece of a mask pattern, by segmenting the piece into a plurality of segments, and applying proximity correction to a first segment without taking into consideration the other segments of the piece.

Abstract: A system for determining an affinity associated with relocating a cell located on a surface of a semiconductor chip to a different location on the surface is disclosed herein. Each cell may be part of a cell net containing multiple cells. The system initially defines a bounding box containing all cells in the net which contains the cell. The system then establishes a penalty vector based on the bounding box and borders of a region containing the cell, computes a normalized sum of penalties for all nets having the cell as a member, and calculates the affinity based on the normalized sum of penalties. Also included in the disclosed system are methods and apparatus for capacity and utilization planning of the use of the floor, or the surface area, and the methods and apparatus for parallelizing the process of affinity based placements using multiple processors. Finally, method and apparatus for connecting the cells based on a Steiner Tree method is disclosed.

Abstract: A system for determining an affinity associated with relocating a cell located on a surface of a semiconductor chip to a different location on the surface is disclosed herein. Each cell may be part of a cell net containing multiple cells. The system initially defines a bounding box containing all cells in the net which contains the cell. The system then establishes a penalty vector based on the bounding box and borders of a region containing the cell, computes a normalized sum of penalties for all nets having the cell as a member, and calculates the affinity based on the normalized sum of penalties. Also included in the disclosed system are methods and apparatus for capacity and utilization planning of the use of the floor, or the surface area, and the methods and apparatus for parallelizing the process of affinity based placements using multiple processors. Finally, method and apparatus for connecting the cells based on a Steiner Tree method is disclosed.

Abstract: The present invention is a method and apparatus for applying one-dimensional proximity correction to a piece of a mask pattern, by segmenting a first piece of a mask pattern with horizontal dividing lines into a plurality of segments, segmenting a second piece of said mask pattern with said horizontal dividing lines into a second plurality of segments, and applying proximity correction to a first segment from said first plurality of segments taking into consideration a second segment from said second plurality of segments.

Abstract: The present invention is a method and apparatus for systematically applying proximity corrections to a mask pattern, wherein the pattern is divided into a grid of equally sized grid rectangles, an inner rectangle comprising a plurality of grid rectangles is formed, an outer rectangle comprising a second plurality of grid rectangles and the inner rectangle is formed and proximity correction is applied to the pattern contained within the inner rectangle as a function of the pattern contained within the outer rectangle.

Abstract: A system for determining an affinity associated with relocating a cell located on a surface of a semiconductor chip to a different location on the surface is disclosed herein. Each cell may be part of a cell net containing multiple cells. The system initially defines a bounding box containing all cells in the net which contains the cell. The system then establishes a penalty vector based on the bounding box and borders of a region containing the cell, computes a normalized sum of penalties for all nets having the cell as a member, and calculates the affinity based on the normalized sum of penalties. Also included in the disclosed system are methods and apparatus for capacity and utilization planning of the use of the floor, or the surface area, and the methods and apparatus for parallelizing the process of affinity based placements using multiple processors. Finally, method and apparatus for connecting the cells based on a Steiner Tree method is disclosed.

Abstract: A multithreaded wavefront routing system for simultaneously planning routes for wiring a semiconductor chip surface. The surface has a plurality of grids located thereon, and routes are planned according to a predetermined netlist. The system steps across the surface from a first location to a second location in a wave-type pattern. The system sequentially steps through the grid arrangement on the chip surface and plans routing one grid at a time using a plurality of threaded processors. The system recognizes pins as it steps through grids and determines a plan for the current grid by evaluating current wire position, target pin location, and any currently planned routes, designating reserved locations wherein the route may be planned subsequent to the current grid, and establishing a wire direction for each wire traversing the current grid.

Abstract: A method for maximizing effectiveness of parallel processing, using multiple processors, to connect pins of a net of an integrated circuit is disclosed. The method requires the pins to be partitioned into sets of pins and the sets of pins to be further partitioned into meta-sets of the sets of pins. The sets and the meta-sets are connected using a minimal spanning tree algorithm, and the connected sets are made to share a pin, thereby ensuring that the whole net is interconnected without creating a loop in the routing. In addition, because the partitions and the sets of partitions average approximately the same number of pins, the work load can easily be balanced between the processors.

Abstract: An Electronic Computer Aided Design System provides for concurrent operation of a plurality of design tools which share a common design dataset. Changes made by one program to the design dataset are immediately updated and are automatically reflected in the displayed outputs of the other design tools. A tool manager program allows rule-based automation of the entire system.