Abstract: An integrated circuit includes functional blocks and a data communication network having network stations interconnected via communication channels for communicating data packages between the functional blocks. Each data package includes N data elements having a data element with routing information for the network stations, N being an integer of at least two. The network stations include data routers and network interfaces, where each of the data routers is coupled to a functional block via a network interface. The data communication network includes first and second network stations interconnected through a first communication channel. The network includes M*N data storage elements, M being a positive integer, for introducing a delay of M*N cycles on the first communication channel.

Abstract: An integrated circuit comprises a plurality of data processing circuits (10) and a communication network (12) coupled between the data processing circuits (10). The communication network (12) comprises connections (122) and router circuits (120) coupled between the connections (122). Memory is provided to store definitions for respective data streams, of respective paths along the connections (122), for controlling the router circuits (120) to transmit each data item from each respective data stream along the respective path programmed for that respective data stream. Initially initial paths for a set of original data streams are defined and started. Subsequently an additional data stream can be added. If so a new path is selected in combination with future paths for the original data streams.

Abstract: An electronic device is provided which comprises an interconnect means (N) for coupling a plurality of processing modules (IP1-IP5) to enable a communication between the processing modules (IP1-IP5). The electronic device further comprises a plurality of network interfaces (NI) for coupling the interconnect means (N) to one of the processing modules (IP1-IP5). Furthermore, at least one time slot allocating unit (SA) is provided for allocating time slots to channels of the interconnect means (N). The time slot allocating unit (SA) comprises a plurality of slot tables (T0-T4) with a plurality of entries. Each entry corresponds to a fraction of the available bandwidth of the interconnect means (N). A first slot table of the plurality of slot tables (T0-T4) comprises at least one first entry of the plurality of entries which relates to a second slot table of the plurality of slot tables (T0-T4).

Abstract: A data processing system and a method for synchronizing data traffic including a conversion unit which converts first data into second data. The first data is controlled by a first scheme for reservation of resources and the second data being controlled by a second scheme for reservation of resources. The conversion unit may be referred to as a network-level bridge (NWB) . For example, the different schemes for reservation of resources may be based on slot tables, in which case, the conversion unit converts the slot assignments for the first data into the slot assignments for the second data.

Abstract: An integrated circuit comprises a plurality of data processing circuits (10) and a communication network (12) coupled between the data processing circuits (10). The communication network (12) comprises connections (122) and router circuits (120) coupled between the connections (122). Memory is provided to store definitions for respective data streams, of respective paths along the connections (122), for controlling the router circuits (120) to transmit each data item from each respective data stream along the respective path programmed for that respective data stream. Initially initial paths for a set of original data streams are defined and started. Subsequently an additional data stream can be added. If so a new path is selected in combination with future paths for the original data streams.

Abstract: An electronic device is provided which comprises an interconnect means (N) for coupling a plurality of processing modules (IP1-IP5) to enable a communication between the processing modules (IP1-IP5). The electronic device further comprises a plurality of network interfaces (NI) for coupling the interconnect means (N) to one of the processing modules (IP1-IP5). Furthermore, at least one time slot allocating unit (SA) is provided for allocating time slots to channels of the interconnect means (N). The time slot allocating unit (SA) comprises a plurality of slot tables (TO-T4) with a plurality of entries. Each entry corresponds to a fraction of the available bandwidth of the interconnect means (N). A first slot table of the plurality of slot tables (TO-T4) comprises at least one first entry of the plurality of entries which relates to a second slot table of the plurality of slot tables (TO-T4).

Abstract: An electronic device is provided, comprising an interconnect means (N) for connecting a plurality of modules (IP; A-D, M) to enable a communication between the modules (IP; A-D, M), wherein communication resources relate to a time division multiple access based on time slots for dividing and sharing an available communication bandwidth. The electronic device furthermore comprises at least one network interface for coupling at least one of the plurality of modules (IP; A-D, M) to the interconnect means (N). The network interface (NI) is adapted to establish at least one connection to at least one further network interface (NI). The at least one connection comprises at least one channel (a d). The at least one network interface (NI) comprises at least one slot table (ST1-ST11) for reserving time slots for the at least one channel (a-d). The time slots are shared between those channels (a-d) which are associated to the same network interface (NI).

Abstract: An electronic device is provided comprising a plurality of first shared resources (SR1-SR4) and a plurality of arbiter units (AAU1-AAU4) each for performing an arbitration for at least one of the plurality of shared resources (SR1-SR4). The communication between the arbiter units (AAU1-AAU4) is performed on an asynchronous basis, and the data communication between the first shared resources is performed on an asynchronous basis. Each arbiter unit (AAU1-AAU4) is adapted for sending a first token (T) to at least one neighboring arbiter unit (AAU1-AAU4), and for receiving a second token (T) from at least one neighboring arbiter unit (AAU1-AAU4) to implement a first global notion of time.

Abstract: An integrated circuit (10) comprises a plurality of functional blocks (101, 102, 103, 104) and a data communication network (100) comprising a plurality of network stations being interconnected via a plurality of communication channels (150) for communicating data packages between the functional blocks (101, 102, 103, 104). Each data package comprising N data elements including a data element comprising routing information for the network stations (110, 120, 130, 140), N being an integer of at least two.

Abstract: The invention relates to an integrated circuit comprising a plurality of processing modules (IP) and a network (NoC) arranged for coupling processing modules (IP), comprising: the processing module (IP) includes an associated network interface (NI) which is provided for transmitting data to the network (NoC) supplied by the associated processing module and for receiving data from the network (NoC) destined for the associated processing module, wherein the data transmission between processing modules (IP) operates based on time division multiple access (TDMA) using time slots (S) and contention free transmission by using channels (a-d); each network interface (NI) includes a slot table (ST) for storing an allocation of a time slot to a certain channel (a-d), wherein at least a part of the time slots (0-9) allocated to channels (a-d) originated from the same network interface (NI) are shared for transmission of data of the set of channels (a-d).

Abstract: The invention relates to a method for allocating data to at least one packet in an integrated circuit, the integrated circuit comprising a network through which the packet is sent from a first module to at least one second module, the method comprising the step of determining the length of the packet. The length of a packet is determined on basis of dynamically known parameters instead of statically known parameters, which increases flexibility with regard to the allocation of data units to packets. The method of packetization takes into account runtime aspects when determining the length of the packets to be transmitted via the communication channels of the network.

Abstract: The invention relates to a data processing system and a method for synchronizing data traffic. The invention relies on the perception that the lack of synchronization of data traffic is primarily caused by the use of different schemes for reservation of resources. According to the invention, a conversion unit is provided which converts first data into second data, the first data being controlled by a first scheme for reservation of resources and the second data being controlled by a second scheme for reservation of resources. The conversion unit may be referred to as a network-level bridge (NWB). For example, the different schemes for reservation of resources may be based on slot tables, in which case the conversion unit converts the slot assignments for the first data into the slot assignments for the second data.

Abstract: The invention provides a router which can be deployed in a network on an integrated circuit. The router is capable of processing input data belonging to multiple traffic classes. The router can further guarantee, under admissible traffic, that all input data are processed and output adequately at an acceptable cost. The invention relies on the perception that the problem of contention is constituted by two more specific problems: input contention and output contention. The problem of input contention does not occur anymore, because the switch comprised in the router is designed such that it can serve multiple queues coupled to input ports simultaneously. The problem of starvation, caused by a continuous preference of high priority traffic to low priority traffic, is solved by allowing to serve queues containing data from low priority traffic classes simultaneously with queues containing data from high priority traffic classes.

Abstract: A data switching device has inputs for Granted Throughput (GT) and Best Effort (BE) data, outputs, a data switch interconnecting the inputs and outputs, (GT) control means for controlling the (GT) data scheduling and (BE) control means for controlling the (BE) data scheduling. The (GT) and (BE) control means are arranged for a combined control such that the (BE) data scheduling is based on a contention free (GT) scheduling.

Abstract: A communication network has one or more interconnected data switches having I/O ports and at least one virtual port. The communication network further has means for subjecting the ports to one and the same contention resolution process.

Abstract: A network for transporting data consists of a group of two or more nodes, such as switches, routers or computer systems, linked together. Data is transported from a source node to a destination node through the network. In packed-switched networks, small units of data called packets are routed through the network from a source node to a destination node. These packets can also be used to program the network. In some cases it is required that the packet travels the return path to the source node. In the present invention, the return path is derived from information stored in the nodes of the network.