Patents by Inventor Edwin SILVERA

Edwin SILVERA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10606752
    Abstract: Embodiments include a method and system for coordinating cache management for an exclusive cache hierarchy. The method and system may include managing, by a coordinated cache logic section, a level three (L3) cache, a level two (L2) cache, and/or a level one (L1) cache. Managing the L3 cache and the L2 cache may include coordinating a cache block replacement policy among the L3 cache and the L2 cache by filtering data with lower reuse probability from data with higher reuse probability. The method and system may include tracking reuse patterns of demand requests separately from reuse patterns of prefetch requests. Accordingly, a coordinated cache management policy may be built across multiple levels of a cache hierarchy, rather than a cache replacement policy within one cache level. Higher-level cache behavior may be used to guide lower-level cache allocation, bringing greater visibility of cache behavior to exclusive last level caches (LLCs).
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: March 31, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yingying Tian, Tarun Nakra, Khang Nguyen, Ravikanth Reddy, Edwin Silvera
  • Publication number: 20190138449
    Abstract: Embodiments include a method and system for coordinating cache management for an exclusive cache hierarchy. The method and system may include managing, by a coordinated cache logic section, a level three (L3) cache, a level two (L2) cache, and/or a level one (L1) cache. Managing the L3 cache and the L2 cache may include coordinating a cache block replacement policy among the L3 cache and the L2 cache by filtering data with lower reuse probability from data with higher reuse probability. The method and system may include tracking reuse patterns of demand requests separately from reuse patterns of prefetch requests. Accordingly, a coordinated cache management policy may be built across multiple levels of a cache hierarchy, rather than a cache replacement policy within one cache level. Higher-level cache behavior may be used to guide lower-level cache allocation, bringing greater visibility of cache behavior to exclusive last level caches (LLCs).
    Type: Application
    Filed: February 6, 2018
    Publication date: May 9, 2019
    Inventors: Yingying TIAN, Tarun NAKRA, Khang NGUYEN, Ravikanth REDDY, Edwin SILVERA
  • Patent number: 9418019
    Abstract: An embodiment includes a system, comprising: a cache configured to store a plurality of cache lines, each cache line associated with a priority state from among N priority states; and a controller coupled to the cache and configured to: search the cache lines for a cache line with a lowest priority state of the priority states to use as a victim cache line; if the cache line with the lowest priority state is not found, reduce the priority state of at least one of the cache lines; and select a random cache line of the cache lines as the victim cache line if, after performing each of the searching of the cache lines and the reducing of the priority state of at least one cache line K times, the cache line with the lowest priority state is not found. N is an integer greater than or equal to 3; and K is an integer greater than or equal to 1 and less than or equal to N?2.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kevin Lepak, Tarun Nakra, Khang Nguyen, Murali Chinnakonda, Edwin Silvera
  • Publication number: 20150331608
    Abstract: An electronic system includes: a storage unit configured to store a data array; a control unit configured to: determine availability of the data array; reorder access to the data array; and provide access to the data array.
    Type: Application
    Filed: November 14, 2014
    Publication date: November 19, 2015
    Inventors: Edwin Silvera, Murali Chinnakonda, Tarun Nakra, Kevin Lepak
  • Publication number: 20150186280
    Abstract: An embodiment includes a system, comprising: a cache configured to store a plurality of cache lines, each cache line associated with a priority state from among N priority states; and a controller coupled to the cache and configured to: search the cache lines for a cache line with a lowest priority state of the priority states to use as a victim cache line; if the cache line with the lowest priority state is not found, reduce the priority state of at least one of the cache lines; and select a random cache line of the cache lines as the victim cache line if, after performing each of the searching of the cache lines and the reducing of the priority state of at least one cache line K times, the cache line with the lowest priority state is not found. N is an integer greater than or equal to 3; and K is an integer greater than or equal to 1 and less than or equal to N?2.
    Type: Application
    Filed: May 2, 2014
    Publication date: July 2, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kevin LEPAK, Tarun NAKRA, Khang NGUYEN, Murali CHINNAKONDA, Edwin SILVERA