Abstract: A logic circuit arrangement providing logical operations on serial data. The clock-controlled arrangement can transfer data bits internally either unchanged or subject to selected logical action and can thereby perform combinational and sequential logic on data bits, or resultant outputs, transferred at different points in time. In one form using semiconductor techniques a circuit arrangement (FIG. 11) is operated by mode controls M and clock controls C to transfer data bits unchanged or subject to logical action from inputs D, D to outputs Q, Q. A return signal path providing a time interval (FIGS. 3 and 4) and a mode controlled forward signal path (FIGS. 3 and 4) form a typical arrangement in which each clock signal processes an input data bit.

Abstract: A bistable of the emitter coupled type is provided in which the two halves of the bistable are effectively made independently bistable by providing feedback cross-coupling via an additional pair of emitter coupled transistors. This together with the buffering of the outputs which are taken from the additional transistors reduces the effects of clock breakthrough and the effective capacitance of the output modes and provides for a significant increase in potential working speed.