Abstract: A method, system, and article provide robust automatic exposure control using embedded data.

Abstract: Disclosed herein are electronic device display interface embodiments for controlling a camera and for reviewing images captured in the device from the camera. For example, in some embodiments, a device is provided with a display for viewing images to be captured by the camera and to provide a display interface for controlling camera operation, wherein the display interface, when in an image capture mode, is to provide an image capture button with two or more smaller image mode buttons disposed adjacent to the image capture button.

Abstract: An electronic apparatus may be provided that includes a processor to perform operations, and a memory subsystem including a plurality of parallel memory banks to store a two-dimensional (2D) array of data using a shifted scheme. Each memory bank may include at least two elements per bank word.

Abstract: The present disclosure provides techniques for capturing a series of images. In particular, the present disclosure provides techniques for capturing a series of images using a camera integrated with a computing device, such as a cellular phone. A camera may capture a series of images and store the images in a buffer until all images in the series are captured. The images may be transferred to a storage medium after all images in the series are captured. The images may further be processed before being transferred to the storage medium.

Abstract: An electronic signal processing circuit contains a chain of stream processing circuits (12a-d). Linking multiplexing circuits (16a-c), link respective pairs of stream processing circuits (12a-d). Each linking multiplexing circuit (16a-c) is individually switchable to a normal mode and to a replacement mode. A linking multiplexing circuit (16a c), when in the normal mode, provides a continuous connection for passing a first stream of samples values between the stream processing circuits (12a-d) in the respective pair. A shareable communication structure (14a-c) is coupled to the linking multiplexing circuits (I 6a-c). Each linking multiplexing circuit (16a-c), when in the replacement mode, provides a continuous connection for supplying successive sample values from a second stream from the communication structure (14a-c) to a receiving one of the stream processing circuits (12a-d) in the respective pair of the linking multiplexing circuit (16a-c).

Abstract: An integrated data processing circuit contains matrix of programmable processors. Each processor (12) has private operand transfer connections to its neighboring processors (12) in the matrix, typically for passing operands of transfer commands. An additional tree communication structure contain router circuits (16, 18, 19) hierarchically coupled to each other and to the processors. The processors (12) form leave nodes of the tree structure, the router circuits (16, 18, 19) being arranged to route a message with an address from a root router (19) circuit to an addressed processor (12), selectively via a path through the tree structure, the router circuits (16, 18, 19) each selecting a part of the path under control of the address.