Patents by Inventor Eelco J. Dijkstra

Eelco J. Dijkstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6292883
    Abstract: A source program is executed on microcontroller core 114 of a processing unit 100. The core 114 is capable of native instructions from a predetermined set of micro-controller specific instructions. In a pre-processing step, for the program statements of the source program a program-specific virtual machine is defined with a corresponding set of virtual machine instructions, such that the expression of the program statements in the sequence of instructions requires less storage space compared to using only native instructions. For the program-specific virtual machine an associated conversion means 132 is defined for converting the program-specific virtual machine instructions into the native instructions of the core 114. The source program statements are expressed in a sequence of instructions comprising instructions of the defined virtual machine. The sequence of instructions is stored in an instruction memory 120. The conversion means 114 is represented in the processing unit 100.
    Type: Grant
    Filed: September 28, 1998
    Date of Patent: September 18, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Alexander Augusteijn, Eelco J. Dijkstra, Paulus M. H. M. A. Gorissen, Franciscus J. H. M. Meulenbroeks, Paul Stravers, Joachim A. Trescher
  • Patent number: 6105120
    Abstract: Multiple format addressing is implemented in a microcontroller that has both ROM and RAM memory facility, processing facility, and bus facility for interconnecting the memory and processing facilities, through using a low address field for local addressing, and at least one facultative high address field for extended addressing. In particular, the high address field is provided in a first addressing format as a segment address, and in a second addressing format as containing a RAM/ROM selection bit. More in particular, the high address field can be provided in a third addressing format as containing a RAM/ROM selection bit and a segment address in respective mutually exclusive fields.
    Type: Grant
    Filed: September 24, 1997
    Date of Patent: August 15, 2000
    Assignee: U.S. Philips Corporation
    Inventors: Paulus M. H. M. A. Gorissen, Alexander Augusteijn, Eelco J. Dijkstra