Abstract: A method for fusing functions of a software program is provided. The method includes processing an intermediate representation (IR) of the software program and determining one or more function call candidates capable of fusion based on the processed IR. The method further includes determining similarities between the function call candidates and generating a merged function of the function call candidates based on the determined similarities. The method further includes generating at least one interleaved version of the merged function and determining an optimized function version from among the merged function and the at least one interleaved version. The method further includes generating a fused function based on the determined optimized function version.

Abstract: A method and apparatus for computer operation improvement by flattening multi-level data structures to optimize pointer chase is provided. Within computer program code, one or more chains of multiple pointers which ultimately reference stored information to be processed are identified. These chains are analyzed to determine the feasibility of replacing the chains with a flatter data structure. In the flatter data structure, the stored information is accessible more directly. For example the data may be stored in a single array by which it can be accessed directly. When feasible, a chain is replaced with such a data structure and the computer program code is adjusted to implement the improved data structure in place of the associated chain. Candidate chains can be identified or prioritized for example on the basis of the expected impact to computer performance, e.g. in terms of operating speed or resource usage.

Abstract: There is provided methods and devices for dynamically simplifying processor instructions. A method includes receiving, at a computing device, processor instructions and determining, by the computing device, if instruction simplification is enabled for an instruction being processed. The method further includes determining, by the computing device, from an instruction simplification table if the instruction is capable of being simplified and scheduling, by the computing device, a simplified instruction based on the determination from the instruction simplification table. A device includes a processor, and a non-transient computer readable memory having stored thereon instructions which when executed by the processor configure the device to execute the methods disclosed herein.

Abstract: There is provided methods and apparatus to improve runtime by computer programs at compilation time. A compiler analyzes code to be translated into machine executable instructions to identify overloaded functional units of the target processor, and replaces instructions scheduled on the overloaded functional unit to an idle unit using functionally equivalent operations on the idle unit. The replacement instructions may be taken from an instruction replacement library comprising function calls that implement functionality of a functional unit of the target processor on another functional unit of the target processor.

Abstract: A method for fusing functions of a software program is provided. The method includes processing an intermediate representation (IR) of the software program and determining one or more function call candidates capable of fusion based on the processed IR. The method further includes determining similarities between the function call candidates and generating a merged function of the function call candidates based on the determined similarities. The method further includes generating at least one interleaved version of the merged function and determining an optimized function version from among the merged function and the at least one interleaved version. The method further includes generating a fused function based on the determined optimized function version.

Abstract: There is provided methods and devices for dynamically simplifying processor instructions. A method includes receiving, at a computing device, processor instructions and determining, by the computing device, if instruction simplification is enabled for an instruction being processed. The method further includes determining, by the computing device, from an instruction simplification table if the instruction is capable of being simplified and scheduling, by the computing device, a simplified instruction based on the determination from the instruction simplification table. A device includes a processor, and a non-transient computer readable memory having stored thereon instructions which when executed by the processor configure the device to execute the methods disclosed herein.

Abstract: There is provided methods and apparatus to improve runtime by computer programs at compilation time. A compiler analyzes code to be translated into machine executable instructions to identify overloaded functional units of the target processor, and replaces instructions scheduled on the overloaded functional unit to an idle unit using functionally equivalent operations on the idle unit. The replacement instructions may be taken from an instruction replacement library comprising function calls that implement functionality of a functional unit of the target processor on another functional unit of the target processor.

Abstract: A method for scheduling instructions for execution on a computer system includes scanning a plurality of loop instructions that are modulo scheduled to identify a first instruction and a second instruction that both utilize a register of the computer system upon execution of the plurality of instructions. The loop has a first initiation interval. The first instruction defines a first value of the register in a first iteration of the loop and the second instruction redefines the value of the register to a second value in a subsequent iteration of the loop prior to a use of the first value in the first iteration of the loop. A copy instruction is inserted in the loop instructions to copy the first value prior to execution of the second instruction. A schedule is determined after the insertion of the one or more copy instructions giving a second initiation interval.

Abstract: A method for scheduling instructions for execution on a computer system includes scanning a plurality of loop instructions that are modulo scheduled to identify a first instruction and a second instruction that both utilize a register of the computer system upon execution of the plurality of instructions. The loop has a first initiation interval. The first instruction defines a first value of the register in a first iteration of the loop and he second instruction redefines the value of the register to a second value in a subsequent iteration of the loop prior to a use of the first value in the first iteration of the loop. A copy instruction is inserted in the loop instructions to copy the first value prior to execution of the second instruction. A schedule is determined after the insertion of the one or more copy instructions giving a second initiation interval.

Abstract: There is provided a method, apparatus and network node for determining an optimal functional unit for currently scheduled instructions. Embodiments divide the function unit assignment problem into separate assessments and subsequently reconciling any conflicts arising from different conclusions for the optimal functional unit. The separate assessments of the optimal functional unit relate to assessment of the optimal functional unit in terms of instruction bundling and the optimal functional unit in terms of latency. For the selection of the best functional unit in terms of instruction bundling, consideration regarding maximizing the size of instruction bundle is considered while taking into account the priority of instructions in the available queue. For the selection of the best functional unit in terms of latency, the most important successor of instruction node is primarily considered.

Abstract: Techniques for generating a decision to store units of an item may be provided. The units of the item may be offered from a network-based resource. For example, a first ordering channel and a second ordering channel may be provided to facilitate orders of the item from the network-based resource. The first and second ordering channels may allow random orders and deterministic orders of the item, respectively. Additionally, a value of a look ahead window associated with the second ordering channel may be accessed. The value may shift a time for an automatic generation of a deterministic order. Further, a first loss and a second loss may be computed based on the value. The first and second losses may be associated with losing a random order and losing the deterministic order, respectively. The decision may be generated based at least in part on the first loss and the second loss.

Abstract: A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack.

Abstract: A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack.

Abstract: Generating SIMD code from code statements that include non-isomorphic code statements. Code statements are received, each code statement has one or more operators in a respective operator order and each operator has a type and associated operands. At least two code statements among the code statements received have an operator of the same type in a different operator order position. A first operator order position is identified for the operators of the same type in each of the code statements. For each of the code statements, code is generated for operators and their associated operands having operator order positions preceding the first operator order positions. SIMD code is generated at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.

Abstract: Generating SIMD code from code statements that include non-isomorphic code statements. Code statements are received, each code statement has one or more operators in a respective operator order and each operator has a type and associated operands. At least two code statements among the code statements received have an operator of the same type in a different operator order position. A first operator order position is identified for the operators of the same type in each of the code statements. For each of the code statements, code is generated for operators and their associated operands having operator order positions preceding the first operator order positions. SIMD code is generated at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.

Abstract: Generating SIMD code from code statements that include non-isomorphic code statements. Code statements are received, each code statement has one or more operators in a respective operator order and each operator has a type and associated operands. At least two code statements among the code statements received have an operator of the same type in a different operator order position. A first operator order position is identified for the operators of the same type in each of the code statements. For each of the code statements, code is generated for operators and their associated operands having operator order positions preceding the first operator order positions. SIMD code is generated at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.

Abstract: A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack.

Abstract: A computer identifies one or more pairs of scalar statements and performs a cost analysis of operations of each of the one or more pairs of scalar statements to determine both a benefit and a cost of operations. The computer determines, based, at least in part, on the cost analysis, a gain for each of the one or more pairs of scalar statements. The computer creates based, at least in part, on the gain, a sorted list of each of the one or more pairs of scalar statements and selects a first pair from the sorted list. The computer issues a query to a hash table using a statement of the first pair and selects from results received from the query, a second pair. The computer then extends, based, at least in part, on the second pair, the first pair to create a pack.

Abstract: Generating SIMD code from code statements that include non-isomorphic code statements. Code statements are received, each code statement has one or more operators in a respective operator order and each operator has a type and associated operands. At least two code statements among the code statements received have an operator of the same type in a different operator order position. A first operator order position is identified for the operators of the same type in each of the code statements. For each of the code statements, code is generated for operators and their associated operands having operator order positions preceding the first operator order positions. SIMD code is generated at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions.