Abstract: A method and apparatus for metaphysical address space for holding lossy metadata is herein described. An explicit or implicit metadata access operation referencing data address of a data item is encountered. Hardware modifies the data address to a metadata address including a metaphysical extension. The metaphysical extension overlays one or more metaphysical address space(s) on the data address space. A portion of the metadata address including the metaphysical extension is utilized to search a tag array of the cache memory holding the data item. As a result, metadata access operations only hit metadata entries of the cache based on the metadata address extension. However, as the metadata is held within the cache, the metadata potentially competes with data for space within the cache.

Abstract: An apparatus and method are described for detecting and correcting data fetch errors within a processor core. For example, one embodiment of an instruction processing apparatus for detecting and recovering from data fetch errors comprises: at least one processor core having a plurality of instruction processing stages including a data fetch stage and a retirement stage; and error processing logic in communication with the processing stages to perform the operations of: detecting an error associated with data in response to a data fetch operation performed by the data fetch stage; and responsively performing one or more operations to ensure that the error does not corrupt an architectural state of the processor core within the retirement stage.

Abstract: A method and apparatus for extending cache coherency to hold buffered data to support transactional execution is herein described. A transactional store operation referencing an address associated with a data item is performed in a buffered manner. Here, the coherency state associated with cache lines to hold the data item are transitioned to a buffered state. In response to local requests for the buffered data item, the data item is provided to ensure internal transactional sequential ordering. However, in response to external access requests, a miss response is provided to ensure the transactionally updated data item is not made globally visible until commit. Upon commit, the buffered lines are transitioned to a modified state to make the data item globally visible.

Abstract: An electrode assembly is provided that is configured to be coupled to nervous tissue of a subject, the electrode assembly including one or more conductive elements. At least a portion of the electrode assembly, including the conductive elements, is configured to be dissolvable after the electrode assembly has been coupled to the tissue. The electrode assembly is configured to come loose from the tissue upon dissolving of the dissolvable at least a portion thereof. Other embodiments are also described.

Abstract: A method and apparatus for providing a memory model for hardware attributes to support transactional execution is herein described. Upon encountering a load of a hardware attribute, such as a test monitor operation to load a read monitor, write monitor, or buffering attribute, a fault is issued in response to a loss field indicating the hardware attribute has been lost. Furthermore, dependency actions, such as blocking and forwarding, are provided for the attribute access operations based on address dependency and access type dependency. As a result, different scenarios for attribute loss and testing thereof are allowed and restricted in a memory model.

Abstract: Apparatus is provided for application to a nerve of a subject, including an electrode cuff, which includes a housing, which is configured to be placed at least partially around the nerve so as to define an inner surface of the housing that faces the nerve. A plurality of insulating elements are coupled to the inner surface of the housing at respective insulating element longitudinal positions along the housing, such that the inner surface of the housing and pairs of the insulating elements define one or more respective cavities at respective cavity longitudinal positions along the housing. One or more electrodes are fixed to the housing in fewer than all of the cavities, such that at least one of the cavities is an empty cavity that does not have an electrode positioned therein. Other embodiments are also described.

Abstract: Apparatus is provided for applying current to a nerve. A cathode is adapted to be placed in a vicinity of a cathodic longitudinal site of the nerve and to apply a cathodic current to the nerve. A primary inhibiting anode is adapted to be placed in a vicinity of a primary anodal longitudinal site of the nerve and to apply a primary anodal current to the nerve. A secondary inhibiting anode is adapted to be placed in a vicinity of a secondary anodal longitudinal site of the nerve and to apply a secondary anodal current to the nerve, the secondary anodal longitudinal site being closer to the primary anodal longitudinal site than to the cathodic longitudinal site.

Abstract: Apparatus is provided for application to a nerve of a subject, including an electrode cuff, which includes a housing, which is configured to be placed at least partially around the nerve so as to define an inner surface of the housing that faces the nerve. A plurality of insulating elements are coupled to the inner surface of the housing at respective insulating element longitudinal positions along the housing, such that the inner surface of the housing and pairs of the insulating elements define one or more respective cavities at respective cavity longitudinal positions along the housing. One or more electrodes are fixed to the housing in fewer than all of the cavities, such that at least one of the cavities is an empty cavity that does not have an electrode positioned therein. Other embodiments are also described.

Abstract: A method and apparatus for monitoring memory accesses in hardware to support transactional execution is herein described. Attributes are monitor accesses to data items without regard for detection at physical storage structure granularity, but rather ensuring monitoring at least at data items granularity. As an example, attributes are added to state bits of a cache to enable new cache coherency states. Upon a monitored memory access to a data item, which may be selectively determined, coherency states associated with the data item are updated to a monitored state. As a result, invalidating requests to the data item are detected through combination of the request type and the monitored coherency state of the data item.

Abstract: An electrode device is configured to be coupled to a parasympathetic site of a subject. A control unit is configured to drive the electrode device to apply a current in bursts of one or more pulses, during “on” periods that alternate with low stimulation periods, wherein at least one of the low stimulation periods immediately following the at least one of the “on” periods has a low stimulation duration equal to at least 50% of the “on” duration; set the current applied on average during the low stimulation periods to be less than 20% of the current applied on average during the “on” periods; and ramp a number of pulses per burst during a commencement of the at least one of the “on” periods and/or a conclusion of the at least one of the “on” periods.

Abstract: Apparatus is provided for applying current to a nerve. A cathode is adapted to be placed in a vicinity of a cathodic longitudinal site of the nerve and to apply a cathodic current to the nerve. A primary inhibiting anode is adapted to be placed in a vicinity of a primary anodal longitudinal site of the nerve and to apply a primary anodal current to the nerve. A secondary inhibiting anode is adapted to be placed in a vicinity of a secondary anodal longitudinal site of the nerve and to apply a secondary anodal current to the nerve, the secondary anodal longitudinal site being closer to the primary anodal longitudinal site than to the cathodic longitudinal site.

Abstract: A method and apparatus for monitoring memory accesses in hardware to support transactional execution is herein described. Attributes are monitor accesses to data items without regard for detection at physical storage structure granularity, but rather ensuring monitoring at least at data items granularity. As an example, attributes are added to state bits of a cache to enable new cache coherency states. Upon a monitored memory access to a data item, which may be selectively determined, coherency states associated with the data item are updated to a monitored state. As a result, invalidating requests to the data item are detected through combination of the request type and the monitored coherency state of the data item.

Abstract: A method and apparatus for providing a memory model for hardware attributes to support transactional execution is herein described. Upon encountering a load of a hardware attribute, such as a test monitor operation to load a read monitor, write monitor, or buffering attribute, a fault is issued in response to a loss field indicating the hardware attribute has been lost. Furthermore, dependency actions, such as blocking and forwarding, are provided for the attribute access operations based on address dependency and access type dependency. As a result, different scenarios for attribute loss and testing thereof are allowed and restricted in a memory model.

Abstract: Apparatus is provided for application to a nerve of a subject, the apparatus comprising an electrode device, which comprises a housing, which is configured to be placed at least partially around the nerve, so as to define an outer surface of the electrode device and an inner surface that faces the nerve. The electrode device further comprises one or more first electrode contact surfaces, fixed to the inner surface of the housing, and one or more second electrode contact surfaces, fixed to the outer surface of the housing. Other embodiments are also described.

Abstract: A method is provided including selecting a patient suffering from a condition, administering cells to the patient selected from the group consisting of: progenitor cells and genetically-modified cells, applying an electrical current to a site of the patient in a vicinity of nervous tissue, and configuring the current to stimulate the nervous tissue. Other embodiments are also described.

Abstract: In a particular embodiment, a storage device with a memory, a controller, and a host interface has a write-once read-many device configuration. The memory contains a database having entries, each entry for a logical memory address. The memory further contains information for converting each logical memory address to a redirected logical memory address that corresponds to a physical memory location. The controller receives a command specifying a logical memory address and interprets the command based on information extracted from the database. The controller executes the command according to the information.

Abstract: Apparatus is provided including an electrode device and a control unit. The electrode device is configured to be coupled to a site of a subject selected from the group consisting of: a vagus nerve, an epicardial fat pad, a pulmonary vein, a carotid artery, a carotid sinus, a coronary sinus, a vena cava vein, a right ventricle, a right atrium, and a jugular vein.

Abstract: A method is provided for treating heart failure in a subject in need of such treatment, including applying a stimulating current to parasympathetic nervous tissue of the subject, selected from the group consisting of: a vagus nerve and an epicardial fat pad. The stimulating current is configured to inhibit release of at least one proinflammatory cytokine sufficiently to the treat heart failure of the subject. A level of the at least one proinflammatory cytokine is measured. Optionally, the stimulating current is configured to change a level of Connexin 43 of the subject, and the level of Connexin 43 is also measured. Other embodiments are also described.

Abstract: An electrode assembly includes one or more electrode contact surfaces, and a cuff, to which the contact surfaces are fixed, and which comprises an electrically insulating material, is configured to assume open and closed positions, and, when in the closed position, is shaped so as to define a plurality of planar cross sections perpendicular to a longitudinal axis of the cuff, distributed continuously along an entire length of the cuff along the longitudinal axis, such that the perpendicular cross sections define respective inner closed curves that together define an inner surface that defines and completely surrounds a volume that extends along the entire length of the cuff. The inner closed curves of at least two of the perpendicular cross sections would cross, and not merely intersect, one another if superimposed while preserving orientation and position of the perpendicular cross sections with respect to the cuff. Other embodiments are also described.

Abstract: Apparatus is provided for applying current to a nerve. A cathode is adapted to be placed in a vicinity of a cathodic longitudinal site of the nerve and to apply a cathodic current to the nerve. A primary inhibiting anode is adapted to be placed in a vicinity of a primary anodal longitudinal site of the nerve and to apply a primary anodal current to the nerve. A secondary inhibiting anode is adapted to be placed in a vicinity of a secondary anodal longitudinal site of the nerve and to apply a secondary anodal current to the nerve, the secondary anodal longitudinal site being closer to the primary anodal longitudinal site than to the cathodic longitudinal site.