Abstract: A Doherty amplifier includes: a carrier amplifier to amplify a first high frequency signal having a first higher harmonic and a second higher harmonic; a peak amplifier to amplify a second high frequency signal having the first higher harmonic and the second higher harmonic; a first series resonant circuit connected between an output end of the carrier amplifier and a ground, and configured to resonate at the frequency of the first higher harmonic; a second series resonant circuit connected between an output end of the peak amplifier and the ground, and configured to resonate at the frequency of the first higher harmonic; a first parallel resonant circuit configured to resonate at the frequency of the second higher harmonic; and a second parallel resonant circuit configured to resonate at the frequency of the second higher harmonic.

Abstract: A high-efficiency amplifier is configured so that short stubs are provided in a line between a first substrate end and a second substrate end of a substrate, and among the short stubs, short stubs provided at locations other than both ends of the line include two short stubs and which are adjacent to each other, and which are provided at locations at which the two short stubs are to be electromagnetically coupled to each other.

Abstract: An amplifier is configured in such a way that a first capacitor resonates at the frequency of a second harmonic wave included in a signal outputted from an amplifying element, a circuit including a second transmission line, the first capacitor, and a second capacitor resonates at the frequency of a third harmonic wave included in the signal outputted from the amplifying element, and also matches the impedance for a fundamental wave together with an impedance matching circuit.

Abstract: A dielectric heating device is provided with two or more electrodes, a grounded surface connected to a first electrode, a signal source connected to a second electrode to output a high-frequency signal, a first element interposed serially between the signal source and second electrode, and a second element interposed serially between the grounded surface and first electrode. The first element includes two terminals that electrically connect the signal source and second electrode in a non-contact manner, to cause the high-frequency signal outputted from the signal source to pass through the first element, by using the electric coupling between the two terminals. The second element includes two terminals that electrically connect the grounded surface and first electrode in a non-contact manner, to output, by using the electric coupling between the two terminals, the high-frequency signal outputted from the signal source, to the grounded surface.

Abstract: A MIM capacitor is included in any one or more of a first matching circuit and a second matching circuit. The mat capacitor performs impedance matching of a fundamental wave included in a high-frequency signal with a transmission line, and forms a short-circuit point for a harmonic included in the high-frequency signal at a connection point with the transmission line.

Abstract: A MIM capacitor is included in any one or more of a first matching circuit and a second matching circuit. The mat capacitor performs impedance matching of a fundamental wave included in a high-frequency signal with a transmission line, and forms a short-circuit point for a harmonic included in the high-frequency signal at a connection point with the transmission line.

Abstract: When a potential difference V1 between a source terminal of an E-type FET (11) and a source terminal of a D-type FET (12) is larger than a threshold voltage Vth, a protection circuit (13) starts an operation to reduce the potential difference V1 such that the potential difference V1 is smaller than the threshold voltage Vth. This makes it possible to prevent destruction of the E-type FET (11) even when a signal to be amplified is an RF signal.

Abstract: A control circuit (16) is configured to detect the impedance P1 of a load (3) and control each of the reactance value L1 of a first variable reactance element (12), the reactance value L2 of a second variable reactance element (14), and the phase shift amount ? of a phase shifter (15) on the basis of the detected impedance P1. Consequently, impedance matching can be achieved even with the phase shifter (15) that performs discrete phase shift control.

Abstract: A high-efficiency amplifier is configured so that short stubs are provided in a line between a first substrate end and a second substrate end of a substrate, and among the short stubs, short stubs provided at locations other than both ends of the line include two short stubs and which are adjacent to each other, and which are provided at locations at which the two short stubs are to be electromagnetically coupled to each other.

Abstract: What is provided are: two or more electrodes; a grounded surface connected to a first one of the electrodes; a signal source that is connected to a second one of the electrodes, and that outputs a high-frequency signal; a high-frequency passing heat-insulation element that is interposed serially between the signal source and the second electrode, that includes two terminals which are electrically coupled mutually and without contact with each other to electrically connect the signal source and the second electrode in a non-contact manner, and that causes the high-frequency signal outputted from the signal source to pass therethrough, by using the electric coupling between the two terminals; and a high-frequency passing heat-insulation element that is interposed serially between the grounded surface and the first electrode, that includes two terminals which are electrically coupled mutually and without contact with each other to electrically connect the grounded surface and the first electrode in a non-contact

Abstract: An amplifier is configured in such a way that a first capacitor resonates at the frequency of a second harmonic wave included in a signal outputted from an amplifying element, a circuit including a second transmission line, the first capacitor, and a second capacitor resonates at the frequency of a third harmonic wave included in the signal outputted from the amplifying element, and also matches the impedance for a fundamental wave together with an impedance matching circuit.

Abstract: A control circuit (16) is configured to detect the impedance P1 of a load (3) and control each of the reactance value L1 of a first variable reactance element (12), the reactance value L2 of a second variable reactance element (14), and the phase shift amount ? of a phase shifter (15) on the basis of the detected impedance P1. Consequently, impedance matching can be achieved even with the phase shifter (15) that performs discrete phase shift control.

Abstract: A printed wiring board includes conductor layers, a core layer having an opening, and a build-up layer. A high frequency device placed within the opening is installed such that a mirror surface is thermally connected to a conductor layer for heat dissipation facing the opening from a lower surface side of the core layer, and terminals on the terminal surface are electrically connected to conductor layers formed on an upper surface side of the core layer.

Abstract: When a potential difference V1 between a source terminal of an E-type FET (11) and a source terminal of a D-type FET (12) is larger than a threshold voltage Vth, a protection circuit (13) starts an operation to reduce the potential difference V1 such that the potential difference V1 is smaller than the threshold voltage Vth. This makes it possible to prevent destruction of the E-type FET (11) even when a signal to be amplified is an RF signal.

Abstract: A printed wiring board includes conductor layers, a core layer having an opening, and a build-up layer. A high frequency device placed within the opening is installed such that a mirror surface is thermally connected to a conductor layer for heat dissipation facing the opening from a lower surface side of the core layer, and terminals on the terminal surface are electrically connected to conductor layers formed on an upper surface side of the core layer.

Abstract: A multi-finger transistor includes a circuit suppressing a variation in voltage current distribution. The circuit connects gate fingers (21) to each other, or source fingers (31) to each other in a region which is located outside an active region (11) and on a side where a drain pad (42) is disposed. The multi-finger transistor is configured to be linearly symmetric with respect to a direction of propagation of a signal from a gate pad (22) at the position of the gate pad (22).

Abstract: A multi-finger transistor includes a circuit suppressing a variation in voltage current distribution. The circuit connects gate fingers (21) to each other, or source fingers (31) to each other in a region which is located outside an active region (11) and on a side where a drain pad (42) is disposed. The multi-finger transistor is configured to be linearly symmetric with respect to a direction of propagation of a signal from a gate pad (22) at the position of the gate pad (22).

Abstract: Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.

Abstract: The connection intervals of N amplifier blocks 3-1 to 3-N to an input transmission line 1 increase with the distance from a signal input terminal RFin, and among the N amplifier blocks 3-1 to 3-N, the input capacitor 4 in an amplifier block 3-n connected to the input transmission line 1 at a more distant side from the signal input terminal RFin has a lower capacitance value Cn.

Abstract: Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.