Patents by Inventor Eigo Shirakashi

Eigo Shirakashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070161342
    Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.
    Type: Application
    Filed: February 27, 2007
    Publication date: July 12, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
  • Publication number: 20040266322
    Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.
    Type: Application
    Filed: April 29, 2004
    Publication date: December 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
  • Publication number: 20040127148
    Abstract: A method for fabricating a semiconductor device, which includes the process step of polishing a substrate using CMP. To suppress the generation of scars and scratches on a wafer surface, in the polishing process, a tube-type slurry supply pump 15 is used to supply slurry. Then, in the tube-type slurry supply pump 15, a vinyl chloride type tube is used as a tube 12 for supplying a slurry.
    Type: Application
    Filed: September 29, 2003
    Publication date: July 1, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masashi Hamanaka, Eigo Shirakashi, Fumitaka Ito
  • Publication number: 20040097174
    Abstract: On the surface of a belt-type surface plate wound around two rollers whose rotation axes are arranged in parallel with each other, four or other number of sheet-shaped polishing pads of polyurethane are stuck. Each of the polishing pads has grooves extending in the same direction as the drive direction of the surface plate. Moreover, the polishing pads adjacently arranged in the drive direction of the surface plate are stuck apart in such a manner that the grooves of one polishing pad are spaced not to align with the respective grooves of the other polishing pad.
    Type: Application
    Filed: September 22, 2003
    Publication date: May 20, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Eigo Shirakashi, Masashi Hamanaka, Fumitaka Ito