Patents by Inventor Eiichi Sugishima

Eiichi Sugishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5497289
    Abstract: An inverter apparatus having a compact design and a changeable heat sink. The apparatus includes a power module formed in a case having pairs of parallel sides and containing the respective main circuit semiconductor devices for converting an alternating current input into a direct current and then further into an alternating current of variable frequency. The heat sink also has pairs of parallel sides and interfaces with the case in a plane whereon the projections of the sink and the case are coextensive. The apparatus also has a body with pairs of parallel sides that fasten to the case and constitute part of the enclosure of the inverter apparatus. The body, case, heat sink and associated circuit elements have alignment structures that permit easy and reliable disassembly and assembly of the apparatus.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: March 5, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eiichi Sugishima, Naohiro Hirose, Wataru Ikeshita, Shinzo Tomonaga
  • Patent number: 5218523
    Abstract: A driver circuit for a half-bridge portion of an inverter device includes a upper arm driver circuit and a lower arm driver circuit for driving a upper arm IGBT and a lower arm IGBT, respectively. The lower arm driver circuit is supplied from a lower arm driver voltage source, while the upper arm driver circuit is supplied from a capacitor, which is charged by the lower arm driver voltage source via a diode and the lower arm IGBT when the lower arm IGBT is turned on. A current limiter is coupled in series with the capacitor to limit the magnitude of the initial charging current of the capacitor while the charge stored across the capacitor is null or small, such that the voltage controller for the lower arm driver voltage source is not disturbed. Alternatively, a pulse generator is provided to generate pulses which repeatedly turn on and off the lower arm driver circuit before the upper arm driver circuit and the lower arm driver circuit are driven complimentarily.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: June 8, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eiichi Sugishima
  • Patent number: 5214575
    Abstract: An apparatus and method for detecting a ground fault occurring on an output side of an inverter circuit, which includes a converter circuit for rectifying an alternating current into a direct current, a capacitor for smoothing the direct current, an inverter circuit for converting the smoothed direct current into a predetermined frequency and voltage through the on/off operation of switching elements connected in parallel with diodes, and a PWM signal generator for controlling the on/off of the switching elements.
    Type: Grant
    Filed: December 16, 1991
    Date of Patent: May 25, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eiichi Sugishima, Taro Ando
  • Patent number: 4819157
    Abstract: An overcurrent protection circuit for an inverter device including three arms each composed of a pair of series connected electric gates, a junction therebetween being connected to a load and opposite ends being connected across a d.c. power source, and adapted to supply a three-phase a.c. power to the load by on-off controlling the electric gates sequentially according to on-off signals of the electric gates supplied from a control circuit. Majority logic circuitry is provided, and stress conditions in the electric gates which receive substantially a stress produced when the electric gates are turned off are detected in order to release these gates from a large stress exerted on the gates when an output short-circuit occurs. The majority logic circuitry control the sequence of turning off the electric gates so that the stress on the detected gate is reduced, to protect the gates from damage due to excess stress on the gates when the output short-circuit occurs.
    Type: Grant
    Filed: October 2, 1987
    Date of Patent: April 4, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenji Hirose, Eiichi Sugishima, Masakatsu Daijyo
  • Patent number: 4745535
    Abstract: A ringing choke-type DC/DC converter comprising a transformer having a primary winding, a secondary winding, and a feedback winding, an input DC power source connected through a transistor to the primary winding of the transformer, a DC power output connected through a diode to the secondary winding of the transformer, a base circuit having a first capacitor and connected between the base of the transistor and the feedback winding of the transformer, a branch circuit branching from the base circuit and having a Zener diode connected in series with a second capacitor, and an impedance provided in series between the transistor and the branch circuit for preventing the transistor from intermittently operating, thereby stabilizing the DC power output.
    Type: Grant
    Filed: March 12, 1987
    Date of Patent: May 17, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eiichi Sugishima, Osamu Miyazaki
  • Patent number: 4686480
    Abstract: A wave generation circuit for a pulse width modulation inverter generates a plurality of differently phased waves which are modulated to form driving signals for switching elements in the inverter. This circuit has a single memory element having waveform data stored therein and also has an operation circuit for providing phase address signals which indicate the address of the waveform data corresponding to each phase. The data at the indicated addresses are read out of the memory element and latched by a phase latch circuit for each phase. When all of the stored data corresponding to each phase have been latched, the operation circuit transmits an output timing signal to cause the phase latch circuits to simultaneously provide the latched data which form driving signals for the switching elements.
    Type: Grant
    Filed: October 1, 1984
    Date of Patent: August 11, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masayuki Katto, Eiichi Sugishima
  • Patent number: 4628395
    Abstract: The inverter device for performing a.c.-d.c.-a.c. conversion has a power discrimination circuit for discriminating whether a power source is of a single phase or three phases. As a result of discrimination, a suitable overload protecting circuit provided in the device is selected or a reference level for overcurrent is changed to thereby protect structural elements such as a converter, a smoothing capacitor etc. from breakage caused by overcurrent.
    Type: Grant
    Filed: November 21, 1984
    Date of Patent: December 9, 1986
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eiichi Sugishima
  • Patent number: D328058
    Type: Grant
    Filed: March 9, 1990
    Date of Patent: July 21, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakatsu Suzuki, Eiichi Sugishima, Hideo Iinuma
  • Patent number: D330701
    Type: Grant
    Filed: March 9, 1990
    Date of Patent: November 3, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakatsu Suzuki, Eiichi Sugishima, Hideo Iinuma