Abstract: An analog signal generation apparatus includes: a converter which converts an input waveform signal into a one-bit signal; a control section which, in response to a mute-off instruction, controls a pulse width time length of the one-bit signal, output from the converter, to progressively increase from zero to a target value; and a filter which converts the one-bit signal, controlled by the control section, into an analog signal. The control section may further perform, in response to a mute-on instruction, control for progressively decreasing the pulse width time length of the one-bit signal, output from the converter, from a current value to zero. The mute-off instruction is given in response to turning-on of a power supply, and the mute-on instruction is given in response to a power supply OFF instruction.

Abstract: An analog signal generation apparatus includes: a converter which converts an input waveform signal into a one-bit signal; a control section which, in response to a mute-off instruction, controls a pulse width time length of the one-bit signal, output from the converter, to progressively increase from zero to a target value; and a filter which converts the one-bit signal, controlled by the control section, into an analog signal. The control section may further perform, in response to a mute-on instruction, control for progressively decreasing the pulse width time length of the one-bit signal, output from the converter, from a current value to zero. The mute-off instruction is given in response to turning-on of a power supply, and the mute-on instruction is given in response to a power supply OFF instruction.

Abstract: A serial memory stores a plurality of waveform samples. A tone generating unit has a plurality of channels operating in time-divisional manner to generate therethrough sound signals based on waveform samples read from the serial memory, each channel issuing a sample request for a waveform sample with specifying a read address of the waveform sample. Upon power on or reset of the tone generating unit, an access unit sets the serial memory to enable n-bit input/output operation. In response to the sample request, the access unit uses an n-bit input/output instruction to read the waveform sample by n bits per clock from a lead address that is the read address specified by the sample request, and supplies the waveform sample read from the serial memory to the tone generating unit.

Abstract: A serial memory stores a plurality of waveform samples. A tone generating unit has a plurality of channels operating in time-divisional manner to generate therethrough sound signals based on waveform samples read from the serial memory, each channel issuing a sample request for a waveform sample with specifying a read address of the waveform sample. Upon power on or reset of the tone generating unit, an access unit sets the serial memory to enable n-bit input/output operation. In response to the sample request, the access unit uses an n-bit input/output instruction to read the waveform sample by n bits per clock from a lead address that is the read address specified by the sample request, and supplies the waveform sample read from the serial memory to the tone generating unit.

Abstract: User is allowed to designate a desired mode defining the respective numbers of channels and mixing buses, and processing for mixing input signals of the number of channels corresponding to the designated mode is performed repetitively to generate signals for the individual buses. The time of arrival of the last step in the mixing processing for the number of channels, corresponding to the designated mode, is detected to output an accumulation result obtained at the last step, and new accumulation is started with a digital audio signal inputted at a step following the last step. Digital audio signals processed by a first signal processing circuit are stored into a memory and transmitted to a second signal processing circuit via a cascade-connection. The second signal processing circuit adds the audio signal, processed for each of the steps, to audio signals input via the cascade-connection and writes added signal into the memory.

Abstract: User is allowed to designate a desired mode defining the respective numbers of channels and mixing buses, and processing for mixing input signals of the number of channels corresponding to the designated mode is performed repetitively to generate signals for the individual buses. The time of arrival of the last step in the mixing processing for the number of channels, corresponding to the designated mode, is detected to output an accumulation result obtained at the last step, and new accumulation is started with a digital audio signal inputted at a step following the last step. Digital audio signals processed by a first signal processing circuit are stored into a memory and transmitted to a second signal processing circuit via a cascade-connection. The second signal processing circuit adds the audio signal, processed for each of the steps, to audio signals input via the cascade-connection and writes added signal into the memory.

Abstract: User is allowed to designate a desired mode defining the respective numbers of channels and mixing buses, and processing for mixing input signals of the number of channels corresponding to the designated mode is performed repetitively to generate signals for the individual buses. The time of arrival of the last step in the mixing processing for the number of channels, corresponding to the designated mode, is detected to output an accumulation result obtained at the last step, and new accumulation is started with a digital audio signal inputted at a step following the last step. Digital audio signals processed by a first signal processing circuit are stored into a memory and transmitted to a second signal processing circuit via a cascade-connection. The second signal processing circuit adds the audio signal, processed for each of the steps, to audio signals input via the cascade-connection and writes added signal into the memory.

Abstract: User is allowed to designate a desired mode defining the respective numbers of channels and mixing buses, and processing for mixing input signals of the number of channels corresponding to the designated mode is performed repetitively to generate signals for the individual buses. The time of arrival of the last step in the mixing processing for the number of channels, corresponding to the designated mode, is detected to output an accumulation result obtained at the last step, and new accumulation is started with a digital audio signal inputted at a step following the last step. Digital audio signals processed by a first signal processing circuit are stored into a memory and transmitted to a second signal processing circuit via a cascade-connection. The second signal processing circuit adds the audio signal, processed for each of the steps, to audio signals input via the cascade-connection and writes added signal into the memory.